diff mbox series

[06/13] KVM: x86: Extend CPUID range to include new leaf

Message ID 20230904095347.14994-7-manali.shukla@amd.com (mailing list archive)
State New, archived
Headers show
Series Implement support for IBS virtualization | expand

Commit Message

Manali Shukla Sept. 4, 2023, 9:53 a.m. UTC
CPUID leaf 0x8000001b (EAX) provides information about
Instruction-Based sampling capabilities on AMD Platforms. Complete
description about 0x8000001b CPUID leaf is available in AMD
Programmer's Manual volume 3, Appendix E, section E.4.13.
https://bugzilla.kernel.org/attachment.cgi?id=304655

Signed-off-by: Manali Shukla <manali.shukla@amd.com>
---
 arch/x86/kvm/cpuid.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Chao Gao Sept. 12, 2023, 2:46 a.m. UTC | #1
On Mon, Sep 04, 2023 at 09:53:40AM +0000, Manali Shukla wrote:
>CPUID leaf 0x8000001b (EAX) provides information about
>Instruction-Based sampling capabilities on AMD Platforms. Complete
>description about 0x8000001b CPUID leaf is available in AMD
>Programmer's Manual volume 3, Appendix E, section E.4.13.
>https://bugzilla.kernel.org/attachment.cgi?id=304655
>
>Signed-off-by: Manali Shukla <manali.shukla@amd.com>
>---
> arch/x86/kvm/cpuid.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>index 0544e30b4946..1f4d505fb69d 100644
>--- a/arch/x86/kvm/cpuid.c
>+++ b/arch/x86/kvm/cpuid.c
>@@ -771,6 +771,12 @@ void kvm_set_cpu_caps(void)
> 		F(PERFMON_V2)
> 	);
> 
>+	/*
>+	 * Hide all IBS related features by default, it will be enabled
>+	 * automatically when IBS virtualization is enabled
>+	 */
>+	kvm_cpu_cap_init_kvm_defined(CPUID_8000_001B_EAX, 0);
>+
> 	/*
> 	 * Synthesize "LFENCE is serializing" into the AMD-defined entry in
> 	 * KVM's supported CPUID if the feature is reported as supported by the
>@@ -1252,6 +1258,11 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
> 		entry->eax = entry->ebx = entry->ecx = 0;
> 		entry->edx = 0; /* reserved */
> 		break;
>+	/* AMD IBS capability */
>+	case 0x8000001B:
>+		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;

nit: no need to clear entry->eax to 0 because it will be overwritten right below.

>+		cpuid_entry_override(entry, CPUID_8000_001B_EAX);
>+		break;
> 	case 0x8000001F:
> 		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {
> 			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
>-- 
>2.34.1
>
diff mbox series

Patch

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 0544e30b4946..1f4d505fb69d 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -771,6 +771,12 @@  void kvm_set_cpu_caps(void)
 		F(PERFMON_V2)
 	);
 
+	/*
+	 * Hide all IBS related features by default, it will be enabled
+	 * automatically when IBS virtualization is enabled
+	 */
+	kvm_cpu_cap_init_kvm_defined(CPUID_8000_001B_EAX, 0);
+
 	/*
 	 * Synthesize "LFENCE is serializing" into the AMD-defined entry in
 	 * KVM's supported CPUID if the feature is reported as supported by the
@@ -1252,6 +1258,11 @@  static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
 		entry->eax = entry->ebx = entry->ecx = 0;
 		entry->edx = 0; /* reserved */
 		break;
+	/* AMD IBS capability */
+	case 0x8000001B:
+		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
+		cpuid_entry_override(entry, CPUID_8000_001B_EAX);
+		break;
 	case 0x8000001F:
 		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {
 			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;