@@ -4694,7 +4694,7 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
spin_lock_irqsave(&dmar_domain->lock, flags);
list_for_each_entry(curr, &dmar_domain->dev_pasids, link_domain) {
if (curr->dev == dev && curr->pasid == pasid) {
- list_del(&curr->link_domain);
+ list_del_rcu(&curr->link_domain);
dev_pasid = curr;
break;
}
@@ -4703,7 +4703,7 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
spin_unlock_irqrestore(&dmar_domain->lock, flags);
domain_detach_iommu(dmar_domain, iommu);
- kfree(dev_pasid);
+ kfree_rcu(dev_pasid, rcu);
out_tear_down:
intel_pasid_tear_down_entry(iommu, dev, pasid, false);
intel_drain_pasid_prq(dev, pasid);
@@ -4751,8 +4751,14 @@ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain,
dev_pasid->dev = dev;
dev_pasid->pasid = pasid;
+
+ /*
+ * Spin lock protects dev_pasids list from being updated concurrently with
+ * multiple updaters, while rcu ensures concurrency between one updater
+ * and multiple readers
+ */
spin_lock_irqsave(&dmar_domain->lock, flags);
- list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids);
+ list_add_rcu(&dev_pasid->link_domain, &dmar_domain->dev_pasids);
spin_unlock_irqrestore(&dmar_domain->lock, flags);
return 0;
Extend intel_iommu_remove_dev_pasid() and intel_iommu_set_dev_pasid() to support updating dev_pasids list concurrently with readers. For default domain operations, the dev_pasids list accesses are protected by domain->lock and therefore all read/write accesses of default domain operations to dev_pasids list are performed sequentially. To extend intel_iommu_set/remove_dev_pasid() to have the ability to update the dev_pasids list concurrently with multiple readers (which is required by sva domain), RCU mechanism is being used here. Signed-off-by: Tina Zhang <tina.zhang@intel.com> --- drivers/iommu/intel/iommu.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)