From patchwork Fri Oct 20 20:45:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawan Gupta X-Patchwork-Id: 13431107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F122C001DF for ; Fri, 20 Oct 2023 20:45:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232318AbjJTUpU (ORCPT ); Fri, 20 Oct 2023 16:45:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230408AbjJTUpP (ORCPT ); Fri, 20 Oct 2023 16:45:15 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D711D73; Fri, 20 Oct 2023 13:45:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697834711; x=1729370711; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=0qW8gkQ9cQn9nJIAFp1D4GChim4j3ri4y26baGhJi2U=; b=TgfSmSbN2UWoYOR68QBC3ieQZ05CW1/XqLHaJxayGBCoJn/5/ybDPij/ EYG4rXAafabNr1tzgTAlVhftdr7xGEwHdld8P7HZBI9rg0vdFPTs+XkP+ 4dYd+5V1U0XAO0ZsU0LzeGILbka7tIEj17kwG0izuM0XibxtlSQlVlMnP szjlDwHWh9XBMCE6VdHcEZUKJ17aRpCfHp8GdfuKuH23km6dyy6yXqVVP un76a1JOnAPFcfe+GXBCDZkEiLesavYqajCpNi1MwUE102s5vROJ7S3mx gzaYTnX1dY0T3aoJ0x0JAFSOInqsiPsj5FZG+RouyItpLFdxnucZgAzpz w==; X-IronPort-AV: E=McAfee;i="6600,9927,10869"; a="371640238" X-IronPort-AV: E=Sophos;i="6.03,239,1694761200"; d="scan'208";a="371640238" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2023 13:45:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10869"; a="931117494" X-IronPort-AV: E=Sophos;i="6.03,239,1694761200"; d="scan'208";a="931117494" Received: from hkchanda-mobl.amr.corp.intel.com (HELO desk) ([10.209.90.113]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2023 13:45:09 -0700 Date: Fri, 20 Oct 2023 13:45:09 -0700 From: Pawan Gupta To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Jonathan Corbet , Sean Christopherson , Paolo Bonzini , tony.luck@intel.com, ak@linux.intel.com, tim.c.chen@linux.intel.com Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, kvm@vger.kernel.org, Alyssa Milburn , Daniel Sneddon , antonio.gomez.iglesias@linux.intel.com, Pawan Gupta Subject: [PATCH 3/6] x86/entry_32: Add VERW just before userspace transition Message-ID: <20231020-delay-verw-v1-3-cff54096326d@linux.intel.com> X-Mailer: b4 0.12.3 References: <20231020-delay-verw-v1-0-cff54096326d@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20231020-delay-verw-v1-0-cff54096326d@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org As done for entry_64, add support for executing VERW late in exit to user path for 32-bit mode. Signed-off-by: Pawan Gupta --- arch/x86/entry/entry_32.S | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 6e6af42e044a..bbf77d2aab2e 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -886,6 +886,9 @@ SYM_FUNC_START(entry_SYSENTER_32) popfl popl %eax + /* Mitigate CPU data sampling attacks .e.g. MDS */ + USER_CLEAR_CPU_BUFFERS + /* * Return back to the vDSO, which will pop ecx and edx. * Don't bother with DS and ES (they already contain __USER_DS). @@ -954,6 +957,9 @@ restore_all_switch_stack: /* Restore user state */ RESTORE_REGS pop=4 # skip orig_eax/error_code + + /* Mitigate CPU data sampling attacks .e.g. MDS */ + USER_CLEAR_CPU_BUFFERS .Lirq_return: /* * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization @@ -1146,6 +1152,8 @@ SYM_CODE_START(asm_exc_nmi) /* Not on SYSENTER stack. */ call exc_nmi + /* Mitigate CPU data sampling attacks .e.g. MDS */ + USER_CLEAR_CPU_BUFFERS jmp .Lnmi_return .Lnmi_from_sysenter_stack: