| Message ID | 20231112041643.2868316-3-jacob.jun.pan@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Coalesced Interrupt Delivery with posted MSI | expand |
On Sat, Nov 11 2023 at 20:16, Jacob Pan wrote: > This option will be used to support delivering MSIs as posted > interrupts. Interrupt remapping is required. The last sentence does not make sense. > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > --- > arch/x86/Kconfig | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 66bfabae8814..f16882ddb390 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -463,6 +463,16 @@ config X86_X2APIC > > If you don't know what to do here, say N. > > +config X86_POSTED_MSI > + bool "Enable MSI and MSI-x delivery by posted interrupts" > + depends on X86_X2APIC && X86_64 && IRQ_REMAP > + help > + This enables MSIs that are under IRQ remapping to be delivered as posted s/IRQ/interrupt/ This is text and not Xitter. > + interrupts to the host kernel. IRQ throughput can potentially be improved > + by coalescing CPU notifications during high frequency IRQ bursts. > + > + If you don't know what to do here, say N. > + > config X86_MPPARSE > bool "Enable MPS table" if ACPI > default y
Hi Thomas, On Wed, 06 Dec 2023 17:35:29 +0100, Thomas Gleixner <tglx@linutronix.de> wrote: > On Sat, Nov 11 2023 at 20:16, Jacob Pan wrote: > > This option will be used to support delivering MSIs as posted > > interrupts. Interrupt remapping is required. > > The last sentence does not make sense. will remove, superfluous statement. > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > > --- > > arch/x86/Kconfig | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > > index 66bfabae8814..f16882ddb390 100644 > > --- a/arch/x86/Kconfig > > +++ b/arch/x86/Kconfig > > @@ -463,6 +463,16 @@ config X86_X2APIC > > > > If you don't know what to do here, say N. > > > > +config X86_POSTED_MSI > > + bool "Enable MSI and MSI-x delivery by posted interrupts" > > + depends on X86_X2APIC && X86_64 && IRQ_REMAP > > + help > > + This enables MSIs that are under IRQ remapping to be > > delivered as posted > > s/IRQ/interrupt/ OK, will replace this and IRQs below. > This is text and not Xitter. > > > > + interrupts to the host kernel. IRQ throughput can > > potentially be improved > > + by coalescing CPU notifications during high frequency IRQ > > bursts. + > > + If you don't know what to do here, say N. > > + > > config X86_MPPARSE > > bool "Enable MPS table" if ACPI > > default y Thanks, Jacob
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 66bfabae8814..f16882ddb390 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -463,6 +463,16 @@ config X86_X2APIC If you don't know what to do here, say N. +config X86_POSTED_MSI + bool "Enable MSI and MSI-x delivery by posted interrupts" + depends on X86_X2APIC && X86_64 && IRQ_REMAP + help + This enables MSIs that are under IRQ remapping to be delivered as posted + interrupts to the host kernel. IRQ throughput can potentially be improved + by coalescing CPU notifications during high frequency IRQ bursts. + + If you don't know what to do here, say N. + config X86_MPPARSE bool "Enable MPS table" if ACPI default y
This option will be used to support delivering MSIs as posted interrupts. Interrupt remapping is required. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> --- arch/x86/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+)