From patchwork Wed Nov 15 07:14:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13456298 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C853C129 for ; Wed, 15 Nov 2023 07:17:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="oG2AMFqA" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20275101 for ; Tue, 14 Nov 2023 23:17:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700032672; x=1731568672; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lWD1LPHBlnEMY0i0TbouVXN+weA+auM2zL9WG6+DAU0=; b=oG2AMFqASBORz9reqkRgBw44zQJPb5swRZbXhMeb7gHyeYcz68Yvvm/y Mj1MX7O6XvkamPrZPv+34STBokyX8kBN4+FE3gDLfJQLoNbbZwFO1CB9x n+utZ7rAbm3kXjsFXcalFaVghXlEeC7qmdd/l1Dp/D9IwyZq1UCp6IKhR yFW+kMN5+x2RSP9hEEE9wGPuQWrGrQjd8U4961E9Emqvo74+yzVT9Z8Xj zcN2a1DSimh+DNPkBLuE97ENtm2Huzwdx5Q89ljXg149C1xpjoTBjtgyW a+7MZ32Ei0byfkBPw1nju8qlpEhlgpDyv/fi8Bl1gMEVt59udJpAd4CyJ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="390622597" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="390622597" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2023 23:17:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="714798129" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="714798129" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orsmga003.jf.intel.com with ESMTP; 14 Nov 2023 23:17:46 -0800 From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Cornelia Huck , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v3 21/70] i386/tdx: Update tdx_cpuid_lookup[].tdx_fixed0/1 by tdx_caps.cpuid_config[] Date: Wed, 15 Nov 2023 02:14:30 -0500 Message-Id: <20231115071519.2864957-22-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231115071519.2864957-1-xiaoyao.li@intel.com> References: <20231115071519.2864957-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 tdx_cpuid_lookup[].tdx_fixed0/1 is QEMU maintained data which reflects TDX restrictions regrading how some CPUIDs are virtualized by TDX. It's retrieved from TDX spec. However, TDX may change some fixed fields to configurable in the future. Update tdx_cpuid.lookup[].tdx_fixed0/1 fields by removing the bits that reported from TDX module as configurable. This can adapt with the updated TDX (module) automatically. Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index eda6e695a884..7fa86858de58 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -374,6 +374,34 @@ static int get_tdx_capabilities(Error **errp) return 0; } +static void update_tdx_cpuid_lookup_by_tdx_caps(void) +{ + KvmTdxCpuidLookup *entry; + FeatureWordInfo *fi; + uint32_t config; + FeatureWord w; + + /* + * Patch tdx_fixed0/1 by tdx_caps that what TDX module reports as + * configurable is not fixed. + */ + for (w = 0; w < FEATURE_WORDS; w++) { + fi = &feature_word_info[w]; + entry = &tdx_cpuid_lookup[w]; + + if (fi->type != CPUID_FEATURE_WORD) { + continue; + } + + config = tdx_cap_cpuid_config(fi->cpuid.eax, + fi->cpuid.needs_ecx ? fi->cpuid.ecx : ~0u, + fi->cpuid.reg); + + entry->tdx_fixed0 &= ~config; + entry->tdx_fixed1 &= ~config; + } +} + int tdx_kvm_init(MachineState *ms, Error **errp) { TdxGuest *tdx = TDX_GUEST(OBJECT(ms->cgs)); @@ -388,6 +416,8 @@ int tdx_kvm_init(MachineState *ms, Error **errp) } } + update_tdx_cpuid_lookup_by_tdx_caps(); + tdx_guest = tdx; return 0; }