From patchwork Wed Nov 15 07:15:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13456373 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72CF9BA29 for ; Wed, 15 Nov 2023 07:23:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="U5rJCUfr" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0C79E9 for ; Tue, 14 Nov 2023 23:23:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700033036; x=1731569036; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XNTiE6ZqujS4EetrrerE0o29oEenkiGYukDBImCgacA=; b=U5rJCUfrmN3YOI32fV6HbQN5h0bINmD0Ur4jv/OhWl9MRhHEMoBfOnNA BnFnA9ADqrKvWt2GLfLI7IBVEGfAJN0a4SWxgomCSwfxU7CygXhfxEUhf zEKDPlihRQp1q5PMWNd7ndMMvy6lne1xWmwkdC5GIIIub0VvvOU4EC1ni ZzMk3skcCkEq67dI8GL3w5umW1tU3Xwy9hlpeIcR1UWCl1ujFuW7LjyWG PB9F1UrLjTe31+AmkvFtHOitishcR8Ud3Jq5jPhvvAae+lJh9r0w/oR2g eSsuTmaZZ3Jm3VQoXkXl1yS5KZ5LbwHfRm56A15Xmp6Ij+u0G0ooiAqzn A==; X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="390623698" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="390623698" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2023 23:23:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10894"; a="714800444" X-IronPort-AV: E=Sophos;i="6.03,304,1694761200"; d="scan'208";a="714800444" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.52]) by orsmga003.jf.intel.com with ESMTP; 14 Nov 2023 23:23:49 -0800 From: Xiaoyao Li To: Paolo Bonzini , David Hildenbrand , Igor Mammedov , "Michael S . Tsirkin" , Marcel Apfelbaum , Richard Henderson , Peter Xu , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Cornelia Huck , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, xiaoyao.li@intel.com, Michael Roth , Sean Christopherson , Claudio Fontana , Gerd Hoffmann , Isaku Yamahata , Chenyi Qiang Subject: [PATCH v3 66/70] i386/tdx: Don't synchronize guest tsc for TDs Date: Wed, 15 Nov 2023 02:15:15 -0500 Message-Id: <20231115071519.2864957-67-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231115071519.2864957-1-xiaoyao.li@intel.com> References: <20231115071519.2864957-1-xiaoyao.li@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata TSC of TDs is not accessible and KVM doesn't allow access of MSR_IA32_TSC for TDs. To avoid the assert() in kvm_get_tsc, make kvm_synchronize_all_tsc() noop for TDs, Signed-off-by: Isaku Yamahata Reviewed-by: Connor Kuehl Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index a74a0d8e0891..773e0b042ae9 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -279,7 +279,7 @@ void kvm_synchronize_all_tsc(void) { CPUState *cpu; - if (kvm_enabled()) { + if (kvm_enabled() && !is_tdx_vm()) { CPU_FOREACH(cpu) { run_on_cpu(cpu, do_kvm_synchronize_tsc, RUN_ON_CPU_NULL); }