| Message ID | 20231116023036.2324371-3-maobibo@loongson.cn (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | LoongArch: KVM: Remove SW timer switch when vcpu is halt polling | expand |
Reviewed-by: Tianrui Zhao <zhaotianrui@loongson.cn> 在 2023/11/16 上午10:30, Bibo Mao 写道: > Currently HW timer CSR registers are allowed to access before entering to > vm and disabled if switch to SW timer in host mode, instead it is not > necessary to do so. HW timer CSR registers can be accessed always, it > is nothing to do with whether it is in vm mode or host mode. This patch > removes the limitation. > > Signed-off-by: Bibo Mao <maobibo@loongson.cn> > --- > arch/loongarch/kvm/main.c | 1 - > arch/loongarch/kvm/timer.c | 27 ++++++--------------------- > 2 files changed, 6 insertions(+), 22 deletions(-) > > diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c > index 1c1d5199500e..86a2f2d0cb27 100644 > --- a/arch/loongarch/kvm/main.c > +++ b/arch/loongarch/kvm/main.c > @@ -287,7 +287,6 @@ int kvm_arch_hardware_enable(void) > if (env & CSR_GCFG_MATC_ROOT) > gcfg |= CSR_GCFG_MATC_ROOT; > > - gcfg |= CSR_GCFG_TIT; > write_csr_gcfg(gcfg); > > kvm_flush_tlb_all(); > diff --git a/arch/loongarch/kvm/timer.c b/arch/loongarch/kvm/timer.c > index 437e960d8fdb..e37c0ebffabd 100644 > --- a/arch/loongarch/kvm/timer.c > +++ b/arch/loongarch/kvm/timer.c > @@ -70,15 +70,6 @@ void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long timer_hz) > */ > void kvm_acquire_timer(struct kvm_vcpu *vcpu) > { > - unsigned long cfg; > - > - cfg = read_csr_gcfg(); > - if (!(cfg & CSR_GCFG_TIT)) > - return; > - > - /* Enable guest access to hard timer */ > - write_csr_gcfg(cfg & ~CSR_GCFG_TIT); > - > /* > * Freeze the soft-timer and sync the guest stable timer with it. We do > * this with interrupts disabled to avoid latency. > @@ -175,21 +166,15 @@ static void _kvm_save_timer(struct kvm_vcpu *vcpu) > */ > void kvm_save_timer(struct kvm_vcpu *vcpu) > { > - unsigned long cfg; > struct loongarch_csrs *csr = vcpu->arch.csr; > > preempt_disable(); > - cfg = read_csr_gcfg(); > - if (!(cfg & CSR_GCFG_TIT)) { > - /* Disable guest use of hard timer */ > - write_csr_gcfg(cfg | CSR_GCFG_TIT); > - > - /* Save hard timer state */ > - kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG); > - kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL); > - if (kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG) & CSR_TCFG_EN) > - _kvm_save_timer(vcpu); > - } > + > + /* Save hard timer state */ > + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG); > + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL); > + if (kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG) & CSR_TCFG_EN) > + _kvm_save_timer(vcpu); > > /* Save timer-related state to vCPU context */ > kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ESTAT);
diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c index 1c1d5199500e..86a2f2d0cb27 100644 --- a/arch/loongarch/kvm/main.c +++ b/arch/loongarch/kvm/main.c @@ -287,7 +287,6 @@ int kvm_arch_hardware_enable(void) if (env & CSR_GCFG_MATC_ROOT) gcfg |= CSR_GCFG_MATC_ROOT; - gcfg |= CSR_GCFG_TIT; write_csr_gcfg(gcfg); kvm_flush_tlb_all(); diff --git a/arch/loongarch/kvm/timer.c b/arch/loongarch/kvm/timer.c index 437e960d8fdb..e37c0ebffabd 100644 --- a/arch/loongarch/kvm/timer.c +++ b/arch/loongarch/kvm/timer.c @@ -70,15 +70,6 @@ void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long timer_hz) */ void kvm_acquire_timer(struct kvm_vcpu *vcpu) { - unsigned long cfg; - - cfg = read_csr_gcfg(); - if (!(cfg & CSR_GCFG_TIT)) - return; - - /* Enable guest access to hard timer */ - write_csr_gcfg(cfg & ~CSR_GCFG_TIT); - /* * Freeze the soft-timer and sync the guest stable timer with it. We do * this with interrupts disabled to avoid latency. @@ -175,21 +166,15 @@ static void _kvm_save_timer(struct kvm_vcpu *vcpu) */ void kvm_save_timer(struct kvm_vcpu *vcpu) { - unsigned long cfg; struct loongarch_csrs *csr = vcpu->arch.csr; preempt_disable(); - cfg = read_csr_gcfg(); - if (!(cfg & CSR_GCFG_TIT)) { - /* Disable guest use of hard timer */ - write_csr_gcfg(cfg | CSR_GCFG_TIT); - - /* Save hard timer state */ - kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG); - kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL); - if (kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG) & CSR_TCFG_EN) - _kvm_save_timer(vcpu); - } + + /* Save hard timer state */ + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG); + kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL); + if (kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG) & CSR_TCFG_EN) + _kvm_save_timer(vcpu); /* Save timer-related state to vCPU context */ kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ESTAT);
Currently HW timer CSR registers are allowed to access before entering to vm and disabled if switch to SW timer in host mode, instead it is not necessary to do so. HW timer CSR registers can be accessed always, it is nothing to do with whether it is in vm mode or host mode. This patch removes the limitation. Signed-off-by: Bibo Mao <maobibo@loongson.cn> --- arch/loongarch/kvm/main.c | 1 - arch/loongarch/kvm/timer.c | 27 ++++++--------------------- 2 files changed, 6 insertions(+), 22 deletions(-)