| Message ID | 20231117075215.647-1-ke.zhao@shingroup.cn (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | powerpc: Add PVN support for HeXin C2000 processor | expand |
Zhao Ke <ke.zhao@shingroup.cn> writes: > HeXin Tech Co. has applied for a new PVN from the OpenPower Community > for its new processor C2000. The OpenPower has assigned a new PVN > and this newly assigned PVN is 0x0066, add pvr register related > support for this PVN. > > Signed-off-by: Zhao Ke <ke.zhao@shingroup.cn> > Link: https://discuss.openpower.foundation/t/how-to-get-a-new-pvr-for-processors-follow-power-isa/477/10 Hi Zhao Ke, Thanks for the patch. Just a few questions. Are you able to provide any further detail on the processor? Your cputable entry claims that it's identical to the original Power8 core, can you comment at all on how true that is in practice? Unfortunately the kernel has some hard-coded knowledge of various non-architected features, which are not controlled via the CPU table, and are instead controlled by firmware. So you'll need to make sure you set those correctly, see init_fw_feat_flags() for details. One other comment below ... > diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h > index c370c1b804a9..4f604934da7c 100644 > --- a/arch/powerpc/kernel/cpu_specs_book3s_64.h > +++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h > @@ -238,6 +238,21 @@ static struct cpu_spec cpu_specs[] __initdata = { > .machine_check_early = __machine_check_early_realmode_p8, > .platform = "power8", > }, > + { /* 2.07-compliant processor, HeXin C2000 processor */ > + .pvr_mask = 0xffffffff, > + .pvr_value = 0x00660000, > + .cpu_name = "POWER8 (architected)", Using "(architected)" here is not right. That's reserved for the 0x0f00000x range of PVRs. You should use "POWER8 (raw)", or you could actually use the marketing name there if you want to, eg. "HeXin C2000" or whatever. cheers
Hi Michael, On 2023/11/22 9:46, Michael Ellerman wrote: > Zhao Ke <ke.zhao@shingroup.cn> writes: >> HeXin Tech Co. has applied for a new PVN from the OpenPower Community >> for its new processor C2000. The OpenPower has assigned a new PVN >> and this newly assigned PVN is 0x0066, add pvr register related >> support for this PVN. >> >> Signed-off-by: Zhao Ke <ke.zhao@shingroup.cn> >> Link: https://discuss.openpower.foundation/t/how-to-get-a-new-pvr-for-processors-follow-power-isa/477/10 > > Hi Zhao Ke, > > Thanks for the patch. Just a few questions. > > Are you able to provide any further detail on the processor? > > Your cputable entry claims that it's identical to the original Power8 > core, can you comment at all on how true that is in practice? Basically, we made lots of design change for the new processor. For example: 1. redesign the interconnect of the fabric, from crossbar to mesh 2. redesign the memory subsystem, including the modification of L2 and L3 architecture 3. redesign the SMP bus 4. upgrade PCIe to gen5 and increase the number of lanes 5. upgrade ddr to DDR5, dimm direct connected, and the number of channels 6. redesign the pervasive architecture, including debug/trace, clock&power management, etc. > Unfortunately the kernel has some hard-coded knowledge of various > non-architected features, which are not controlled via the CPU table, > and are instead controlled by firmware. So you'll need to make sure you > set those correctly, see init_fw_feat_flags() for details. Thanks for telling me, we have a firmware team and we will work together on this. > One other comment below ... > >> diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h >> index c370c1b804a9..4f604934da7c 100644 >> --- a/arch/powerpc/kernel/cpu_specs_book3s_64.h >> +++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h >> @@ -238,6 +238,21 @@ static struct cpu_spec cpu_specs[] __initdata = { >> .machine_check_early = __machine_check_early_realmode_p8, >> .platform = "power8", >> }, >> + { /* 2.07-compliant processor, HeXin C2000 processor */ >> + .pvr_mask = 0xffffffff, >> + .pvr_value = 0x00660000, >> + .cpu_name = "POWER8 (architected)", > > Using "(architected)" here is not right. That's reserved for the > 0x0f00000x range of PVRs. > > You should use "POWER8 (raw)", or you could actually use the marketing > name there if you want to, eg. "HeXin C2000" or whatever. I will update this asap. > cheers >
Zhao Ke 赵 可 <ke.zhao@shingroup.cn> writes: > On 2023/11/22 9:46, Michael Ellerman wrote: >> Zhao Ke <ke.zhao@shingroup.cn> writes: >>> HeXin Tech Co. has applied for a new PVN from the OpenPower Community >>> for its new processor C2000. The OpenPower has assigned a new PVN >>> and this newly assigned PVN is 0x0066, add pvr register related >>> support for this PVN. >>> >>> Signed-off-by: Zhao Ke <ke.zhao@shingroup.cn> >>> Link: https://discuss.openpower.foundation/t/how-to-get-a-new-pvr-for-processors-follow-power-isa/477/10 >> >> Hi Zhao Ke, >> >> Thanks for the patch. Just a few questions. >> >> Are you able to provide any further detail on the processor? >> >> Your cputable entry claims that it's identical to the original Power8 >> core, can you comment at all on how true that is in practice? > > Basically, we made lots of design change for the new processor. > > For example: > > 1. redesign the interconnect of the fabric, from crossbar to mesh > > 2. redesign the memory subsystem, including the modification of L2 > and L3 architecture > > 3. redesign the SMP bus > > 4. upgrade PCIe to gen5 and increase the number of lanes > > 5. upgrade ddr to DDR5, dimm direct connected, and the number of > channels > > 6. redesign the pervasive architecture, including debug/trace, > clock&power management, etc. OK thanks for the detail. Given all those changes I think you should not use "Power8" as the CPU name. Whatever the lineage of the core design is, it's no longer a literal "Power8", not even the same design using a different process node. So I think you should call it "HeXin C2000" or similar. cheers
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 4ae4ab9090a2..7fd09f25452d 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -1361,6 +1361,7 @@ #define PVR_POWER8E 0x004B #define PVR_POWER8NVL 0x004C #define PVR_POWER8 0x004D +#define PVR_HX_C2000 0x0066 #define PVR_POWER9 0x004E #define PVR_POWER10 0x0080 #define PVR_BE 0x0070 diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h index c370c1b804a9..4f604934da7c 100644 --- a/arch/powerpc/kernel/cpu_specs_book3s_64.h +++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h @@ -238,6 +238,21 @@ static struct cpu_spec cpu_specs[] __initdata = { .machine_check_early = __machine_check_early_realmode_p8, .platform = "power8", }, + { /* 2.07-compliant processor, HeXin C2000 processor */ + .pvr_mask = 0xffffffff, + .pvr_value = 0x00660000, + .cpu_name = "POWER8 (architected)", + .cpu_features = CPU_FTRS_POWER8, + .cpu_user_features = COMMON_USER_POWER8, + .cpu_user_features2 = COMMON_USER2_POWER8, + .mmu_features = MMU_FTRS_POWER8, + .icache_bsize = 128, + .dcache_bsize = 128, + .cpu_setup = __setup_cpu_power8, + .cpu_restore = __restore_cpu_power8, + .machine_check_early = __machine_check_early_realmode_p8, + .platform = "power8", + }, { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ .pvr_mask = 0xffffffff, .pvr_value = 0x0f000005, diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 9118242063fb..5b92619a05fd 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -604,6 +604,7 @@ static void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr) case PVR_POWER8: case PVR_POWER8E: case PVR_POWER8NVL: + case PVR_HX_C2000: case PVR_POWER9: vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE | BOOK3S_HFLAG_NEW_TLBIE; diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index 125733962033..c38f378e1942 100644 --- a/arch/powerpc/mm/book3s64/pkeys.c +++ b/arch/powerpc/mm/book3s64/pkeys.c @@ -89,7 +89,8 @@ static int __init scan_pkey_feature(void) unsigned long pvr = mfspr(SPRN_PVR); if (PVR_VER(pvr) == PVR_POWER8 || PVR_VER(pvr) == PVR_POWER8E || - PVR_VER(pvr) == PVR_POWER8NVL || PVR_VER(pvr) == PVR_POWER9) + PVR_VER(pvr) == PVR_POWER8NVL || PVR_VER(pvr) == PVR_POWER9 || + PVR_VER(pvr) == PVR_HX_C2000) pkeys_total = 32; } } diff --git a/arch/powerpc/platforms/powernv/subcore.c b/arch/powerpc/platforms/powernv/subcore.c index 191424468f10..58e7331e1e7e 100644 --- a/arch/powerpc/platforms/powernv/subcore.c +++ b/arch/powerpc/platforms/powernv/subcore.c @@ -425,7 +425,8 @@ static int subcore_init(void) if (pvr_ver != PVR_POWER8 && pvr_ver != PVR_POWER8E && - pvr_ver != PVR_POWER8NVL) + pvr_ver != PVR_POWER8NVL && + pvr_ver != PVR_HX_C2000) return 0; /* diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index 0562071cdd4a..9ac2991b29c7 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h @@ -836,7 +836,8 @@ static inline bool cxl_is_power8(void) { if ((pvr_version_is(PVR_POWER8E)) || (pvr_version_is(PVR_POWER8NVL)) || - (pvr_version_is(PVR_POWER8))) + (pvr_version_is(PVR_POWER8)) || + (pvr_version_is(PVR_HX_C2000))) return true; return false; }
HeXin Tech Co. has applied for a new PVN from the OpenPower Community for its new processor C2000. The OpenPower has assigned a new PVN and this newly assigned PVN is 0x0066, add pvr register related support for this PVN. Signed-off-by: Zhao Ke <ke.zhao@shingroup.cn> Link: https://discuss.openpower.foundation/t/how-to-get-a-new-pvr-for-processors-follow-power-isa/477/10 --- arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/kernel/cpu_specs_book3s_64.h | 15 +++++++++++++++ arch/powerpc/kvm/book3s_pr.c | 1 + arch/powerpc/mm/book3s64/pkeys.c | 3 ++- arch/powerpc/platforms/powernv/subcore.c | 3 ++- drivers/misc/cxl/cxl.h | 3 ++- 6 files changed, 23 insertions(+), 3 deletions(-)