diff mbox series

[RFC,19/42] iommu/vt-d: Set bit PGSNP in PASIDTE if domain cache coherency is enforced

Message ID 20231202092452.14581-1-yan.y.zhao@intel.com (mailing list archive)
State New, archived
Headers show
Series Sharing KVM TDP to IOMMU | expand

Commit Message

Yan Zhao Dec. 2, 2023, 9:24 a.m. UTC 
Set bit PGSNP (Page Snoop, bit 88) in PASIDTE when attaching device to a
domain whose cache coherency is enforced.

Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
---
 drivers/iommu/intel/pasid.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index 74e8e4c17e814..a42955b5e666f 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -679,10 +679,11 @@  int intel_pasid_setup_second_level(struct intel_iommu *iommu,
 	pasid_set_address_width(pte, agaw);
 	pasid_set_translation_type(pte, PASID_ENTRY_PGTT_SL_ONLY);
 	pasid_set_fault_enable(pte);
+	if (domain->force_snooping)
+		pasid_set_pgsnp(pte);
 	pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap));
 	if (domain->dirty_tracking)
 		pasid_set_ssade(pte);
-
 	pasid_set_present(pte);
 	spin_unlock(&iommu->lock);