@@ -7544,6 +7544,17 @@ static int vmx_vcpu_create(struct kvm_vcpu *vcpu)
return err;
}
+static int vmx_flush_remote_tlbs_range(struct kvm *kvm, gfn_t gfn, gfn_t nr_pages)
+{
+ kvm_make_all_cpus_request(kvm, KVM_REQ_TLB_FLUSH);
+ return 0;
+}
+
+static int vmx_flush_remote_tlbs(struct kvm *kvm)
+{
+ return vmx_flush_remote_tlbs_range(kvm, 0, -1ULL);
+}
+
#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"
#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"
@@ -8528,6 +8539,11 @@ static __init int hardware_setup(void)
vmx_x86_ops.flush_remote_tlbs = hv_flush_remote_tlbs;
vmx_x86_ops.flush_remote_tlbs_range = hv_flush_remote_tlbs_range;
}
+#else
+ if (enable_ept) {
+ vmx_x86_ops.flush_remote_tlbs = vmx_flush_remote_tlbs;
+ vmx_x86_ops.flush_remote_tlbs_range = vmx_flush_remote_tlbs_range;
+ }
#endif
if (!cpu_has_vmx_ple()) {
Add VMX implementation of ops of flush_remote_tlbs* in kvm_x86_ops when enable_ept is on and CONFIG_HYPERV is off. Without ops flush_remote_tlbs* in VMX, kvm_flush_remote_tlbs*() just makes all cpus request KVM_REQ_TLB_FLUSH after finding the two ops are non-present. So, by also making all cpu requests KVM_REQ_TLB_FLUSH in ops flush_remote_tlbs* in VMX, no functional changes should be introduced. The two ops allow vendor code (e.g. VMX) to control when to notify IOMMU to flush TLBs. This is useful for contidions when sequence to flush CPU TLBs and IOTLBs is important. Signed-off-by: Yan Zhao <yan.y.zhao@intel.com> --- arch/x86/kvm/vmx/vmx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)