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Wed, 6 Dec 2023 00:40:04 -0800 From: Yishai Hadas To: , , , CC: , , , , , , , , , , Subject: [PATCH V6 vfio 7/9] vfio/pci: Expose vfio_pci_core_setup_barmap() Date: Wed, 6 Dec 2023 10:38:55 +0200 Message-ID: <20231206083857.241946-8-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20231206083857.241946-1-yishaih@nvidia.com> References: <20231206083857.241946-1-yishaih@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA50:EE_|DS0PR12MB8071:EE_ X-MS-Office365-Filtering-Correlation-Id: d553dd24-b515-41bd-2483-08dbf636fc61 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +eyP5Wb/rs+yyYftZRBzzcFbDisOYAelQSrMd2eeIPrqziFLztIq61aMiG4OeYL3h+hAHNjsmvir5Pdy9vTac/0jrCQLuaiZwZH4xuXNt7Dp3G4QZSQoxHhU2Oa84pFCd8hvpk5Ouq2CL5/6Uj0CjD2I9zFVHSFldbOaQbXXoNlafAq4/rkrkX8NrBcD1mCi4mK3WOeMzhxztOixEL321JS618jpfTOk0EstRU3cNeT5JiXD9Lc7aQBKm9MiU8MiZeiqPQXH5ES6c7LPDFmye4M4BbC2ciqzDehFdK/DqJdGJEz/cmLgil5e6OwCxP8guDbf+Ycf7pJvJ/BFaJdklFmG5lgwlJ6Ly8ZOe5YbMf6sTVvShyRCepjJI9zoPn68XUOEVLKmwTPcSbCB/gX0FqkYnP0VzYrA94ljayge4xSHuWOZKMmMLj26RvQ5W+8QMt6vGj52fQ/SbskafOHl1hI4RFQQk9KukI+lQ2rsgD56lrs4R5k2wdkODkQD7vyGp1Vq8osRaCTP0deZbXIHmyLdqjoHsoZkRkxo7wQDuPdMLTlk4E077k1jp8PXAE4kkmB5d9QSi/tvKPUJdei1mHaivGZqai/H6TiZieSy2GgFy7gJ+eXGme+Bb/ew+z3gjmIHmcihIcEQ6esfkpYTVtcqGUJThquEOXMFLE8wX50UvQTEr3PD4dikVhsGLz18cNnSooMtCeAtBXKfAhmJ9PmpEFPz2EI2BhUrH5rKTSuO6Flh/0m1e/LIIutO+0kwhCWyn8p2rPzCvKHE6UsehA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(136003)(376002)(346002)(39860400002)(396003)(230922051799003)(451199024)(1800799012)(64100799003)(186009)(82310400011)(40470700004)(46966006)(36840700001)(40460700003)(356005)(7636003)(36860700001)(47076005)(82740400003)(83380400001)(478600001)(6666004)(7696005)(107886003)(1076003)(40480700001)(26005)(36756003)(2616005)(86362001)(5660300002)(8936002)(8676002)(4326008)(110136005)(2906002)(41300700001)(316002)(70586007)(70206006)(6636002)(54906003)(426003)(336012)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2023 08:40:22.4542 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d553dd24-b515-41bd-2483-08dbf636fc61 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA50.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8071 Expose vfio_pci_core_setup_barmap() to be used by drivers. This will let drivers to mmap a BAR and re-use it from both vfio and the driver when it's applicable. This API will be used in the next patches by the vfio/virtio coming driver. Signed-off-by: Yishai Hadas Reviewed-by: Jason Gunthorpe --- drivers/vfio/pci/vfio_pci_rdwr.c | 7 ++++--- include/linux/vfio_pci_core.h | 1 + 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index e27de61ac9fe..a9887fd6de46 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -200,7 +200,7 @@ static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, return done; } -static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar) { struct pci_dev *pdev = vdev->pdev; int ret; @@ -223,6 +223,7 @@ static int vfio_pci_setup_barmap(struct vfio_pci_core_device *vdev, int bar) return 0; } +EXPORT_SYMBOL_GPL(vfio_pci_core_setup_barmap); ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) @@ -262,7 +263,7 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, } x_end = end; } else { - int ret = vfio_pci_setup_barmap(vdev, bar); + int ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) { done = ret; goto out; @@ -438,7 +439,7 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, return -EINVAL; #endif - ret = vfio_pci_setup_barmap(vdev, bar); + ret = vfio_pci_core_setup_barmap(vdev, bar); if (ret) return ret; diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 562e8754869d..67ac58e20e1d 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -127,6 +127,7 @@ int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); +int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar); pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, pci_channel_state_t state);