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Mon, 15 Jan 2024 13:15:18 -0800 From: To: , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v16 2/3] vfio/pci: implement range_intesect_range to determine range overlap Date: Mon, 15 Jan 2024 21:15:15 +0000 Message-ID: <20240115211516.635852-3-ankita@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115211516.635852-1-ankita@nvidia.com> References: <20240115211516.635852-1-ankita@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4D:EE_|DM6PR12MB5520:EE_ X-MS-Office365-Filtering-Correlation-Id: 90f5d222-8c0e-416c-40a9-08dc160f1fa8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: d4fM4B3MvKqHbRaTcfq1h2bqLRmqabqLnJp4i6BPq59cyi2tLqaUqjCSBnSMtai4tRSDafHVkE5zVGkg3n8fFhjU2IM0xH2K70Rnco00FmXWY5HQJK1lP7KA/kaaJ24/+vZNXywnGW/MlpvlNGaK6klZbpHcZQRpHI6QoZys9aiJ5vRpai1t8eSz7EGpUOVHaNPpjUZY2XI8AcuV3Svu11sCIX9lzkn4efxZ49zpXlBHICOln15bLox+w+FX5YJidhxcE7Exz1R+tHKfBpHHaij8RkEbN567p7VJsUBlck7D3EyxEK4IzhnKyuZzStJaU1JpvfzZWh6m6ub9tF2E8pnEAjY1aorA9RaurBKqYM4KdKtuzkw8f+77ajt2UwCYnFvKHAFD0f9/pZE4Y37zfeNLZnzJxfsxIMi2ifWKuEVWGbhsuOa5rrrgSlHbnR+cQWMSQERhQ+WyEvWlyi+w1VmZdDlyzPy/v3RlcK2r+kaz1UAIzcN9lEYG4dEgh1hKQc5C1Vu7rLI2LQzw37dEHEvZ5rRb0053v58wbW0UjzO51x2OlU9qXkT5j7HOCP3vWDF6Xx2nMrji2ID2/rwA2Ef+vb3JshmmHJlMG8B4zRhYLHddjVi+PnU8UE7HLW3emyRShMFUvJvtcPVU82VmBhe+m8HDRz5bTaz28v2SNvCQaj8pYMUI07KTK9nL44IrV0kckxO9Jrdoenu19BFrER3aZss9LEpKAQMPQjZXRZ2DLl13S5XH1EOdR3mCxZajlAiIwiWPOao1qhdctqmq4vK2RrDYhS10WxnYFgeRA4M= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(346002)(396003)(136003)(376002)(39860400002)(230922051799003)(1800799012)(82310400011)(451199024)(64100799003)(186009)(46966006)(40470700004)(36840700001)(54906003)(8936002)(316002)(110136005)(8676002)(966005)(5660300002)(478600001)(7696005)(2906002)(40460700003)(6666004)(40480700001)(2876002)(70586007)(2616005)(26005)(36756003)(1076003)(47076005)(336012)(426003)(83380400001)(4326008)(70206006)(36860700001)(41300700001)(82740400003)(356005)(7636003)(86362001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jan 2024 21:15:38.9802 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90f5d222-8c0e-416c-40a9-08dc160f1fa8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5520 From: Ankit Agrawal Add a helper function to determine an overlap between two ranges. If an overlap, the function returns the overlapping offset and size. The VFIO PCI variant driver emulates the PCI config space BAR offset registers. These offset may be accessed for read/write with a variety of lengths including sub-word sizes from sub-word offsets. The driver makes use of this helper function to read/write the targeted part of the emulated register. This is replicated from Yishai's work in https://lore.kernel.org/all/20231207102820.74820-10-yishaih@nvidia.com Signed-off-by: Ankit Agrawal Tested-by: Ankit Agrawal --- drivers/vfio/pci/vfio_pci_config.c | 28 ++++++++++++++++++++++++++++ include/linux/vfio_pci_core.h | 6 ++++++ 2 files changed, 34 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c index 7e2e62ab0869..b77c96fbc4b2 100644 --- a/drivers/vfio/pci/vfio_pci_config.c +++ b/drivers/vfio/pci/vfio_pci_config.c @@ -1966,3 +1966,31 @@ ssize_t vfio_pci_config_rw(struct vfio_pci_core_device *vdev, char __user *buf, return done; } + +bool range_intersect_range(loff_t range1_start, size_t count1, + loff_t range2_start, size_t count2, + loff_t *start_offset, + size_t *intersect_count, + size_t *register_offset) +{ + if (range1_start <= range2_start && + range1_start + count1 > range2_start) { + *start_offset = range2_start - range1_start; + *intersect_count = min_t(size_t, count2, + range1_start + count1 - range2_start); + *register_offset = 0; + return true; + } + + if (range1_start > range2_start && + range1_start < range2_start + count2) { + *start_offset = 0; + *intersect_count = min_t(size_t, count1, + range2_start + count2 - range1_start); + *register_offset = range1_start - range2_start; + return true; + } + + return false; +} +EXPORT_SYMBOL_GPL(range_intersect_range); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index d478e6f1be02..8a11047ac6c9 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -133,4 +133,10 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, void __iomem *io, char __user *buf, loff_t off, size_t count, size_t x_start, size_t x_end, bool iswrite); + +bool range_intersect_range(loff_t range1_start, size_t count1, + loff_t range2_start, size_t count2, + loff_t *start_offset, + size_t *intersect_count, + size_t *register_offset); #endif /* VFIO_PCI_CORE_H */