From patchwork Wed Jan 31 10:13:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13539048 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FAED69D11 for ; Wed, 31 Jan 2024 10:02:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706695323; cv=none; b=H/SymF9XkiyZoSx0PGwNJGoZqWuVaIGTkbNcigLOmYY3K9EAYbLbMh2zjxomAqXRqifE/a/DpqzU09enNIZJBvE6mG3XMgNcbuXoXV2RWrahG7aCUmwPZOvUXuuCpIg3IaMccNhKhwTIx7/xQ737fG72Bgbf9kzEKRNcOZiVjMw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706695323; c=relaxed/simple; bh=0cGhWcQgHVEDvEFjhonbcPS7fz/KlBqAE4ym2nVprMw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cYT1ooOn9vAoXCJQV8RLdbf0NvNmCHFRUimgGkZQ9kCv2oxhYHvLTeVImbUGMb+CrYDnkgzDSxiul+8SZJoCbD4p5MqUkwiA/1aF6bnw5RZMLtYI6ConrK5fbiRY9heJaokLmh+76buPWVSqLJ7hXxXxqyN9MdQg5cdyqqvfgR0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fG5ZSjqc; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fG5ZSjqc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706695322; x=1738231322; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0cGhWcQgHVEDvEFjhonbcPS7fz/KlBqAE4ym2nVprMw=; b=fG5ZSjqcAlKB2GVHFyXJU9E3MWe3zW38DPEfZDICXhS3bMaClYS34iRc EqaMhf92KAArE4Du1g++QwkftWAQ3PSBjVRiM23gg3Pt/kSGU5y9VDdXZ T9jA+l10dXNCvVawuElzHUlnOhRPc8GHH3SZv/43gcs1ocOt6w6PAHwuQ b0c27LoUcFLt/eBHL00Y/vJdLk6+OEsdofUrGcBp+4AC3HE3L0xtQ0p2g ByiW3Kvs04LtKn5uw4SK1KdpS4hXzYWobAqZqsOKmJ7tBUmhglJS0JeYL FNZ3SyK5J4GyqoJuxyCz4mnEDtFrYYT4l0BFBEnSEpBgIopRf+Mn2AHO9 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10969"; a="25033036" X-IronPort-AV: E=Sophos;i="6.05,231,1701158400"; d="scan'208";a="25033036" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2024 02:02:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,231,1701158400"; d="scan'208";a="4036306" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 31 Jan 2024 02:01:56 -0800 From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Paolo Bonzini , Richard Henderson , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Babu Moger , Xiaoyao Li , Zhenyu Wang , Zhuocheng Ding , Yongwei Ma , Zhao Liu Subject: [PATCH v8 18/21] hw/i386/pc: Support smp.modules for x86 PC machine Date: Wed, 31 Jan 2024 18:13:47 +0800 Message-Id: <20240131101350.109512-19-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240131101350.109512-1-zhao1.liu@linux.intel.com> References: <20240131101350.109512-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu As module-level topology support is added to X86CPU, now we can enable the support for the modules parameter on PC machines. With this support, we can define a 5-level x86 CPU topology with "-smp": -smp cpus=*,maxcpus=*,sockets=*,dies=*,modules=*,cores=*,threads=*. Additionally, add the 5-level topology example in description of "-smp". Tested-by: Yongwei Ma Co-developed-by: Zhuocheng Ding Signed-off-by: Zhuocheng Ding Signed-off-by: Zhao Liu --- Changes since v7: * Supported modules instead of clusters for PC. * Dropped Michael/Babu/Yanan's ACKed/Tested/Reviewed tags since the code change. * Re-added Yongwei's Tested tag For his re-testing. --- hw/i386/pc.c | 1 + qemu-options.hx | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 803244e5ccba..22923f26c0e6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1849,6 +1849,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported = true; mc->smp_props.dies_supported = true; + mc->smp_props.modules_supported = true; mc->default_ram_id = "pc.ram"; pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_64; diff --git a/qemu-options.hx b/qemu-options.hx index ced828486376..e164ecb60367 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -345,14 +345,14 @@ SRST -smp 8,sockets=2,cores=2,threads=2,maxcpus=8 The following sub-option defines a CPU topology hierarchy (2 sockets - totally on the machine, 2 dies per socket, 2 cores per die, 2 threads - per core) for PC machines which support sockets/dies/cores/threads. - Some members of the option can be omitted but their values will be - automatically computed: + totally on the machine, 2 dies per socket, 2 modules per die, 2 cores per + module, 2 threads per core) for PC machines which support sockets/dies + /modules/cores/threads. Some members of the option can be omitted but + their values will be automatically computed: :: - -smp 16,sockets=2,dies=2,cores=2,threads=2,maxcpus=16 + -smp 32,sockets=2,dies=2,modules=2,cores=2,threads=2,maxcpus=32 The following sub-option defines a CPU topology hierarchy (2 sockets totally on the machine, 2 clusters per socket, 2 cores per cluster,