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[RFC,08/26] KVM: x86: Expose TM/ACC (CPUID.0x01.edx[bit 29]) feature bit to VM

Message ID 20240203091214.411862-9-zhao1.liu@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Intel Thread Director Virtualization | expand

Commit Message

Zhao Liu Feb. 3, 2024, 9:11 a.m. UTC 
From: Zhuocheng Ding <zhuocheng.ding@intel.com>

The TM (Thermal Monitor, alias, TM1/ACC) feature is a dependency of
thermal interrupt processing so that it is required for the
HFI notification (a thermal interrupt) handling.

According to SDM [1], the TM feature means:
"The TM1 flag (bit 29) of the CPUID feature flags indicates the presence
of the automatic thermal monitoring facilities that modulate clock duty
cycles."

Considering that the TM feature does not provide any OS interaction
interface, but only indicates the presence of a hardware feature.

Therefore, we do not need to perform any additional software emulation
while exposing the TM feature bit.

Expose the TM feature bit to the VM to support the VM in handling the
thermal interrupt.

[1]: SDM, vol. 3B, section 15.8.4.1, Detection of Software Controlled
     Clock Modulation Extension.

Tested-by: Yanting Jiang <yanting.jiang@intel.com>
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Co-developed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 arch/x86/kvm/cpuid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 1ad547651022..829bb9c6516f 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -625,7 +625,7 @@  void kvm_set_cpu_caps(void)
 		F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
 		0 /* Reserved, DS */ | F(ACPI) | F(MMX) |
 		F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
-		0 /* HTT, TM, Reserved, PBE */
+		0 /* HTT */ | F(ACC) | 0 /* Reserved, PBE */
 	);
 
 	kvm_cpu_cap_mask(CPUID_7_0_EBX,