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Thu, 15 Feb 2024 19:01:38 -0800 From: To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , Subject: [PATCH v18 1/3] vfio/pci: rename and export do_io_rw() Date: Fri, 16 Feb 2024 08:31:26 +0530 Message-ID: <20240216030128.29154-2-ankita@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240216030128.29154-1-ankita@nvidia.com> References: <20240216030128.29154-1-ankita@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06C:EE_|SA1PR12MB7317:EE_ X-MS-Office365-Filtering-Correlation-Id: 258646a4-7bdb-4194-1d02-08dc2e9ba07d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OC72srW4X7yRqtZCpAJ7dNp2sECDXeteRaifTUjR1DA5mOxheBhAqreyxysKTBDWtZmpRDqulLhmzYhfz9QL8u+CHA/NNl4jXme8SqJTjLOp5aZPszc0tt0XSvfG3reM1H3xuu195mxf1OTZIvfAoNuxOuMgH3/LU8d8CIzapvfsZi/m/6xG24Y59z69qxMLGXaSuUiuLh8toheLuf8CzoW5WLZAV1sIa9RNfOZUwkryZ9NI9ri9Zk1rYjpfMUUPSkKPN1gsGVAxLvTEATiOreqH8AOXcCTwDjumbGAQ4cN2vqW1ODh65JjHnZgNMfhdSRpxcFl/PnlEYatInmMLniFx+4bdJmEYrsjfQpffE58qkJxLFhSx5jVssnfSGw0fgx21M5cn66LwDazJFWBs1JqRauUHa+F5vxg00mKoPozh6nJKZ2REah2GhyRDlzZsiJiKPeIZdxPmq7IitFTcCSWS/poH6A9+wPAenKLz9brsA0g386afxnvSPKnYrAXOLDp6bkgOwLH+bpW48S5XDlA/qboxoFSrqUO1dxA1bh8NVo/ve9C8S9+jpPCsVL9Vx+VNuSP8CTQ35doz8XRTVDzCjXP3iqInPHBq1Se4xnLJ48OH4G6qTS2OQGlulvgKqKKQ3BFVBi+AWMYBMkqqxysSngUEJ3ZspPj7iZJ9sUg= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(346002)(136003)(376002)(39860400002)(396003)(230922051799003)(82310400011)(451199024)(186009)(64100799003)(1800799012)(36860700004)(40470700004)(46966006)(7416002)(5660300002)(2876002)(2906002)(426003)(336012)(26005)(41300700001)(1076003)(2616005)(8936002)(8676002)(70586007)(70206006)(4326008)(83380400001)(921011)(6666004)(316002)(110136005)(478600001)(7696005)(54906003)(82740400003)(86362001)(36756003)(7636003)(356005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2024 03:01:52.5099 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 258646a4-7bdb-4194-1d02-08dc2e9ba07d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06C.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7317 From: Ankit Agrawal do_io_rw() is used to read/write to the device MMIO. The grace hopper VFIO PCI variant driver require this functionality to read/write to its memory. Rename this as vfio_pci_core functions and export as GPL. Reviewed-by: Kevin Tian Signed-off-by: Ankit Agrawal Reviewed-by: Yishai Hadas --- drivers/vfio/pci/vfio_pci_rdwr.c | 16 +++++++++------- include/linux/vfio_pci_core.h | 5 ++++- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index 07fea08ea8a2..03b8f7ada1ac 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -96,10 +96,10 @@ VFIO_IOREAD(32) * reads with -1. This is intended for handling MSI-X vector tables and * leftover space for ROM BARs. */ -static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, - void __iomem *io, char __user *buf, - loff_t off, size_t count, size_t x_start, - size_t x_end, bool iswrite) +ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, + void __iomem *io, char __user *buf, + loff_t off, size_t count, size_t x_start, + size_t x_end, bool iswrite) { ssize_t done = 0; int ret; @@ -201,6 +201,7 @@ static ssize_t do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, return done; } +EXPORT_SYMBOL_GPL(vfio_pci_core_do_io_rw); int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar) { @@ -279,8 +280,8 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device *vdev, char __user *buf, x_end = vdev->msix_offset + vdev->msix_size; } - done = do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos, - count, x_start, x_end, iswrite); + done = vfio_pci_core_do_io_rw(vdev, res->flags & IORESOURCE_MEM, io, buf, pos, + count, x_start, x_end, iswrite); if (done >= 0) *ppos += done; @@ -348,7 +349,8 @@ ssize_t vfio_pci_vga_rw(struct vfio_pci_core_device *vdev, char __user *buf, * probing, so we don't currently worry about access in relation * to the memory enable bit in the command register. */ - done = do_io_rw(vdev, false, iomem, buf, off, count, 0, 0, iswrite); + done = vfio_pci_core_do_io_rw(vdev, false, iomem, buf, off, count, + 0, 0, iswrite); vga_put(vdev->pdev, rsrc); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 85e84b92751b..cf9480a31f3e 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -130,7 +130,10 @@ void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); int vfio_pci_core_setup_barmap(struct vfio_pci_core_device *vdev, int bar); pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, pci_channel_state_t state); - +ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, + void __iomem *io, char __user *buf, + loff_t off, size_t count, size_t x_start, + size_t x_end, bool iswrite); #define VFIO_IOWRITE_DECLATION(size) \ int vfio_pci_core_iowrite##size(struct vfio_pci_core_device *vdev, \ bool test_mem, u##size val, void __iomem *io);