From patchwork Wed Mar 6 21:14:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 13584653 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9AE8E1CFA0 for ; Wed, 6 Mar 2024 21:15:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709759715; cv=none; b=Vte0jmeCFniAQCMt1oPt0mRB2LmIN1lkco6jKqXgJUDPhXchY9G9MfyYCGO/gD50R7W5wXPEH73HiXxPCjR9eIqLBBXsPWH8tpP5G9EkWP/H9FAkqpXb3JDlrZOIb8xDTXsO7FrVwlcJMDI1nUumuxigzwi9ZbDH08IWEPUv/kM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709759715; c=relaxed/simple; bh=wOwDFMT2KiCzev+G+gGCSLvck07O+ju1uFi54jiOVGs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=poxs1kzqsblxUua7PIQ5gheH7u7j7HSh0nDL7Ua+A4qCj2NHiBuHt0tBH8C05eqyi4WWhu1rDNpQd+Umm9JENHlumayPQYIH2YEdUO1frnB9JJMWCdTa60SeWctqm8/kYPaL6peW808YVr9AYodT+xn7bp7iIYSBc0qA3LEegqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=BIKoRzU7; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="BIKoRzU7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1709759712; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GKxkzdumadq/V7PfTsop/NWO/DaB8TFUcF+bx8hs1/8=; b=BIKoRzU7JVlDBQ4w4oPZX+bIeRXOw1Akk60URHi2/dTQSnqSxZJpTJlAoWL0XOetTNrMIh /kTRE+AqPFwyusgE/jZsioWSjY6zhvIQ+uCGfoiUug5pJvTqwlyCRbYctAGBT25J/Fajz9 miOKHygfa1iN6lHfhEeRhGO1nCIpnQY= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-55-VlFKS75gN6SpkkyvnMo6Hw-1; Wed, 06 Mar 2024 16:15:11 -0500 X-MC-Unique: VlFKS75gN6SpkkyvnMo6Hw-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 10A52800266; Wed, 6 Mar 2024 21:14:56 +0000 (UTC) Received: from omen.home.shazbot.org (unknown [10.22.33.99]) by smtp.corp.redhat.com (Postfix) with ESMTP id 236763701; Wed, 6 Mar 2024 21:14:54 +0000 (UTC) From: Alex Williamson To: alex.williamson@redhat.com Cc: kvm@vger.kernel.org, eric.auger@redhat.com, clg@redhat.com, reinette.chatre@intel.com, linux-kernel@vger.kernel.org, kevin.tian@intel.com Subject: [PATCH 1/7] vfio/pci: Disable auto-enable of exclusive INTx IRQ Date: Wed, 6 Mar 2024 14:14:36 -0700 Message-ID: <20240306211445.1856768-2-alex.williamson@redhat.com> In-Reply-To: <20240306211445.1856768-1-alex.williamson@redhat.com> References: <20240306211445.1856768-1-alex.williamson@redhat.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 Currently for devices requiring masking at the irqchip for INTx, ie. devices without DisINTx support, the IRQ is enabled in request_irq() and subsequently disabled as necessary to align with the masked status flag. This presents a window where the interrupt could fire between these events, resulting in the IRQ incrementing the disable depth twice. This would be unrecoverable for a user since the masked flag prevents nested enables through vfio. Instead, invert the logic using IRQF_NO_AUTOEN such that exclusive INTx is never auto-enabled, then unmask as required. Fixes: 89e1f7d4c66d ("vfio: Add PCI device driver") Signed-off-by: Alex Williamson Reviewed-by: Kevin Tian --- drivers/vfio/pci/vfio_pci_intrs.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 237beac83809..136101179fcb 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -296,8 +296,15 @@ static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd) ctx->trigger = trigger; + /* + * Devices without DisINTx support require an exclusive interrupt, + * IRQ masking is performed at the IRQ chip. The masked status is + * protected by vdev->irqlock. Setup the IRQ without auto-enable and + * unmask as necessary below under lock. DisINTx is unmodified by + * the IRQ configuration and may therefore use auto-enable. + */ if (!vdev->pci_2_3) - irqflags = 0; + irqflags = IRQF_NO_AUTOEN; ret = request_irq(pdev->irq, vfio_intx_handler, irqflags, ctx->name, vdev); @@ -308,13 +315,9 @@ static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd) return ret; } - /* - * INTx disable will stick across the new irq setup, - * disable_irq won't. - */ spin_lock_irqsave(&vdev->irqlock, flags); - if (!vdev->pci_2_3 && ctx->masked) - disable_irq_nosync(pdev->irq); + if (!vdev->pci_2_3 && !ctx->masked) + enable_irq(pdev->irq); spin_unlock_irqrestore(&vdev->irqlock, flags); return 0;