Message ID | 20240307011344.835640-2-seanjc@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: VMX: Disable LBRs if CPU doesn't have callstacks | expand |
On Wed, Mar 06, 2024, Sean Christopherson wrote: > Snapshot VMX's LBR capabilities once during module initialization instead > of calling into perf every time a vCPU reconfigures its vPMU. This will > allow massaging the LBR capabilities, e.g. if the CPU doesn't support > callstacks, without having to remember to update multiple locations. > > Opportunistically tag vmx_get_perf_capabilities() with __init, as it's > only called from vmx_set_cpu_caps(). > > Signed-off-by: Sean Christopherson <seanjc@google.com> > --- Reviewed-by: Mingwei Zhang <mizhang@google.com> > arch/x86/kvm/vmx/pmu_intel.c | 2 +- > arch/x86/kvm/vmx/vmx.c | 9 +++++---- > arch/x86/kvm/vmx/vmx.h | 2 ++ > 3 files changed, 8 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c > index 12ade343a17e..be40474de6e4 100644 > --- a/arch/x86/kvm/vmx/pmu_intel.c > +++ b/arch/x86/kvm/vmx/pmu_intel.c > @@ -535,7 +535,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) > perf_capabilities = vcpu_get_perf_capabilities(vcpu); > if (cpuid_model_is_consistent(vcpu) && > (perf_capabilities & PMU_CAP_LBR_FMT)) > - x86_perf_get_lbr(&lbr_desc->records); > + memcpy(&lbr_desc->records, &vmx_lbr_caps, sizeof(vmx_lbr_caps)); > else > lbr_desc->records.nr = 0; > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 7a74388f9ecf..2a7cd66988a5 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -217,6 +217,8 @@ module_param(ple_window_max, uint, 0444); > int __read_mostly pt_mode = PT_MODE_SYSTEM; > module_param(pt_mode, int, S_IRUGO); > > +struct x86_pmu_lbr __ro_after_init vmx_lbr_caps; > + > static DEFINE_STATIC_KEY_FALSE(vmx_l1d_should_flush); > static DEFINE_STATIC_KEY_FALSE(vmx_l1d_flush_cond); > static DEFINE_MUTEX(vmx_l1d_flush_mutex); > @@ -7844,10 +7846,9 @@ static void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) > vmx_update_exception_bitmap(vcpu); > } > > -static u64 vmx_get_perf_capabilities(void) > +static __init u64 vmx_get_perf_capabilities(void) > { > u64 perf_cap = PMU_CAP_FW_WRITES; > - struct x86_pmu_lbr lbr; > u64 host_perf_cap = 0; > > if (!enable_pmu) > @@ -7857,8 +7858,8 @@ static u64 vmx_get_perf_capabilities(void) > rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); > > if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) { > - x86_perf_get_lbr(&lbr); > - if (lbr.nr) > + x86_perf_get_lbr(&vmx_lbr_caps); > + if (vmx_lbr_caps.nr) > perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT; > } > > diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h > index 65786dbe7d60..cc10df53966e 100644 > --- a/arch/x86/kvm/vmx/vmx.h > +++ b/arch/x86/kvm/vmx/vmx.h > @@ -109,6 +109,8 @@ struct lbr_desc { > bool msr_passthrough; > }; > > +extern struct x86_pmu_lbr vmx_lbr_caps; > + > /* > * The nested_vmx structure is part of vcpu_vmx, and holds information we need > * for correct emulation of VMX (i.e., nested VMX) on this vcpu. > -- > 2.44.0.278.ge034bb2e1d-goog >
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 12ade343a17e..be40474de6e4 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -535,7 +535,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) perf_capabilities = vcpu_get_perf_capabilities(vcpu); if (cpuid_model_is_consistent(vcpu) && (perf_capabilities & PMU_CAP_LBR_FMT)) - x86_perf_get_lbr(&lbr_desc->records); + memcpy(&lbr_desc->records, &vmx_lbr_caps, sizeof(vmx_lbr_caps)); else lbr_desc->records.nr = 0; diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 7a74388f9ecf..2a7cd66988a5 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -217,6 +217,8 @@ module_param(ple_window_max, uint, 0444); int __read_mostly pt_mode = PT_MODE_SYSTEM; module_param(pt_mode, int, S_IRUGO); +struct x86_pmu_lbr __ro_after_init vmx_lbr_caps; + static DEFINE_STATIC_KEY_FALSE(vmx_l1d_should_flush); static DEFINE_STATIC_KEY_FALSE(vmx_l1d_flush_cond); static DEFINE_MUTEX(vmx_l1d_flush_mutex); @@ -7844,10 +7846,9 @@ static void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) vmx_update_exception_bitmap(vcpu); } -static u64 vmx_get_perf_capabilities(void) +static __init u64 vmx_get_perf_capabilities(void) { u64 perf_cap = PMU_CAP_FW_WRITES; - struct x86_pmu_lbr lbr; u64 host_perf_cap = 0; if (!enable_pmu) @@ -7857,8 +7858,8 @@ static u64 vmx_get_perf_capabilities(void) rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) { - x86_perf_get_lbr(&lbr); - if (lbr.nr) + x86_perf_get_lbr(&vmx_lbr_caps); + if (vmx_lbr_caps.nr) perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT; } diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 65786dbe7d60..cc10df53966e 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -109,6 +109,8 @@ struct lbr_desc { bool msr_passthrough; }; +extern struct x86_pmu_lbr vmx_lbr_caps; + /* * The nested_vmx structure is part of vcpu_vmx, and holds information we need * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
Snapshot VMX's LBR capabilities once during module initialization instead of calling into perf every time a vCPU reconfigures its vPMU. This will allow massaging the LBR capabilities, e.g. if the CPU doesn't support callstacks, without having to remember to update multiple locations. Opportunistically tag vmx_get_perf_capabilities() with __init, as it's only called from vmx_set_cpu_caps(). Signed-off-by: Sean Christopherson <seanjc@google.com> --- arch/x86/kvm/vmx/pmu_intel.c | 2 +- arch/x86/kvm/vmx/vmx.c | 9 +++++---- arch/x86/kvm/vmx/vmx.h | 2 ++ 3 files changed, 8 insertions(+), 5 deletions(-)