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AJvYcCXRkGTc3ewTfTmsIEw1rr7knjkO4GVRx+zLWCZdzZmPZjKWVSt02C8Y2Y0nUqyuhGU9g2BMkaX+CX+WIpeZDzjl6zQJ X-Gm-Message-State: AOJu0YybvolaWSR6G6pdp2/CJGAab2UD7U2wDJPuQ5qP9gE+w5doTqlv 5TpN56W3KpddXOZiTCLu/aWCZL6qR/DB8H0uj8NfMLcjouEx02Pp/XvQ6ShlfTfhCSlALoCQMNr xcQ== X-Google-Smtp-Source: AGHT+IGeL/DjPRgCNBVl+V/SB3gCWNCNZ4LpSUf0yDvzT/PpyTaaBz/Gs5dkdOT3yZ6PloXBBo6wJVf66G8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a25:aaa3:0:b0:dc6:db9b:7a6d with SMTP id t32-20020a25aaa3000000b00dc6db9b7a6dmr665270ybi.13.1709774032394; Wed, 06 Mar 2024 17:13:52 -0800 (PST) Reply-To: Sean Christopherson Date: Wed, 6 Mar 2024 17:13:44 -0800 In-Reply-To: <20240307011344.835640-1-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240307011344.835640-1-seanjc@google.com> X-Mailer: git-send-email 2.44.0.278.ge034bb2e1d-goog Message-ID: <20240307011344.835640-4-seanjc@google.com> Subject: [PATCH 3/3] KVM: VMX: Disable LBR virtualization if the CPU doesn't support LBR callstacks From: Sean Christopherson To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Sean Christopherson , Paolo Bonzini Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Mingwei Zhang , Jim Mattson Disable LBR virtualization if the CPU doesn't support callstacks, which were introduced in HSW (see commit e9d7f7cd97c4 ("perf/x86/intel: Add basic Haswell LBR call stack support"), as KVM unconditionally configures the perf LBR event with PERF_SAMPLE_BRANCH_CALL_STACK, i.e. LBR virtualization always fails on pre-HSW CPUs. Simply disable LBR support on such CPUs, as it has never worked, i.e. there is no risk of breaking an existing setup, and figuring out a way to performantly context switch LBRs on old CPUs is not worth the effort. Fixes: be635e34c284 ("KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES") Cc: Mingwei Zhang Cc: Jim Mattson Signed-off-by: Sean Christopherson Tested-by: Mingwei Zhang --- arch/x86/kvm/vmx/vmx.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 2a7cd66988a5..25a7652bee7c 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7859,7 +7859,15 @@ static __init u64 vmx_get_perf_capabilities(void) if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) { x86_perf_get_lbr(&vmx_lbr_caps); - if (vmx_lbr_caps.nr) + + /* + * KVM requires LBR callstack support, as the overhead due to + * context switching LBRs without said support is too high. + * See intel_pmu_create_guest_lbr_event() for more info. + */ + if (!vmx_lbr_caps.has_callstack) + memset(&vmx_lbr_caps, 0, sizeof(vmx_lbr_caps)); + else if (vmx_lbr_caps.nr) perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT; }