diff mbox series

[kvm-unit-tests,v6,07/11] lib/x86: Move xsave helpers to lib/

Message ID 20240411172944.23089-8-vsntk18@gmail.com (mailing list archive)
State New, archived
Headers show
Series Add #VC exception handling for AMD SEV-ES | expand

Commit Message

Vasant Karasulli April 11, 2024, 5:29 p.m. UTC
From: Vasant Karasulli <vkarasulli@suse.de>

Processing CPUID #VC for AMD SEV-ES requires copying xcr0 into GHCB.
Move the xsave read/write helpers used by xsave testcase to lib/x86
to share as common code.

Signed-off-by: Varad Gautam <varad.gautam@suse.com>
Signed-off-by: Vasant Karasulli <vkarasulli@suse.de>
Reviewed-by: Marc Orr <marcorr@google.com>
---
 lib/x86/processor.h | 10 ----------
 lib/x86/xsave.c     | 26 ++++++++++++++++++++++++++
 lib/x86/xsave.h     | 15 +++++++++++++++
 x86/Makefile.common |  1 +
 x86/xsave.c         | 17 +----------------
 5 files changed, 43 insertions(+), 26 deletions(-)
 create mode 100644 lib/x86/xsave.c
 create mode 100644 lib/x86/xsave.h

--
2.34.1
diff mbox series

Patch

diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index b324cbf0..d839308f 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -477,16 +477,6 @@  static inline uint64_t rdpmc(uint32_t index)
 	return val;
 }

-static inline int xgetbv_safe(u32 index, u64 *result)
-{
-	return rdreg64_safe(".byte 0x0f,0x01,0xd0", index, result);
-}
-
-static inline int xsetbv_safe(u32 index, u64 value)
-{
-	return wrreg64_safe(".byte 0x0f,0x01,0xd1", index, value);
-}
-
 static inline int write_cr0_safe(ulong val)
 {
 	return asm_safe("mov %0,%%cr0", "r" (val));
diff --git a/lib/x86/xsave.c b/lib/x86/xsave.c
new file mode 100644
index 00000000..85aae78f
--- /dev/null
+++ b/lib/x86/xsave.c
@@ -0,0 +1,26 @@ 
+// SPDX-License-Identifier: GPL-2.0
+
+#include "libcflat.h"
+#include "xsave.h"
+#include "processor.h"
+
+int xgetbv_safe(u32 index, u64 *result)
+{
+	return rdreg64_safe(".byte 0x0f,0x01,0xd0", index, result);
+}
+
+int xsetbv_safe(u32 index, u64 value)
+{
+	return wrreg64_safe(".byte 0x0f,0x01,0xd1", index, value);
+}
+
+uint64_t get_supported_xcr0(void)
+{
+    struct cpuid r;
+    r = cpuid_indexed(0xd, 0);
+    printf("eax %x, ebx %x, ecx %x, edx %x\n",
+            r.a, r.b, r.c, r.d);
+    return r.a + ((u64)r.d << 32);
+}
+
+
diff --git a/lib/x86/xsave.h b/lib/x86/xsave.h
new file mode 100644
index 00000000..34c1c149
--- /dev/null
+++ b/lib/x86/xsave.h
@@ -0,0 +1,15 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _X86_XSAVE_H_
+#define _X86_XSAVE_H_
+
+#define XCR_XFEATURE_ENABLED_MASK       0x00000000
+#define XCR_XFEATURE_ILLEGAL_MASK       0x00000010
+
+#define XSTATE_FP       0x1
+#define XSTATE_SSE      0x2
+#define XSTATE_YMM      0x4
+
+int xgetbv_safe(u32 index, u64 *result);
+int xsetbv_safe(u32 index, u64 value);
+uint64_t get_supported_xcr0(void);
+#endif
diff --git a/x86/Makefile.common b/x86/Makefile.common
index 25ae6f78..c1e90b86 100644
--- a/x86/Makefile.common
+++ b/x86/Makefile.common
@@ -23,6 +23,7 @@  cflatobjs += lib/x86/stack.o
 cflatobjs += lib/x86/fault_test.o
 cflatobjs += lib/x86/delay.o
 cflatobjs += lib/x86/pmu.o
+cflatobjs += lib/x86/xsave.o
 ifeq ($(CONFIG_EFI),y)
 cflatobjs += lib/x86/amd_sev.o
 cflatobjs += lib/x86/amd_sev_vc.o
diff --git a/x86/xsave.c b/x86/xsave.c
index 5d80f245..f3cbfca4 100644
--- a/x86/xsave.c
+++ b/x86/xsave.c
@@ -1,6 +1,7 @@ 
 #include "libcflat.h"
 #include "desc.h"
 #include "processor.h"
+#include "xsave.h"

 #ifdef __x86_64__
 #define uint64_t unsigned long
@@ -8,22 +9,6 @@ 
 #define uint64_t unsigned long long
 #endif

-static uint64_t get_supported_xcr0(void)
-{
-    struct cpuid r;
-    r = cpuid_indexed(0xd, 0);
-    printf("eax %x, ebx %x, ecx %x, edx %x\n",
-            r.a, r.b, r.c, r.d);
-    return r.a + ((u64)r.d << 32);
-}
-
-#define XCR_XFEATURE_ENABLED_MASK       0x00000000
-#define XCR_XFEATURE_ILLEGAL_MASK       0x00000010
-
-#define XSTATE_FP       0x1
-#define XSTATE_SSE      0x2
-#define XSTATE_YMM      0x4
-
 static void test_xsave(void)
 {
     unsigned long cr4;