@@ -42,6 +42,8 @@
(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
#define pgd_offset(pgtable, addr) ((pgtable) + pgd_index(addr))
+#define PTE_NS_SHARED 0
+
#define pgd_free(pgd) free(pgd)
static inline pgd_t *pgd_alloc(void)
{
@@ -23,6 +23,8 @@
pgd_t *mmu_idmap;
+/* Used by Realms, depends on IPA size */
+unsigned long prot_ns_shared = 0;
unsigned long phys_mask_shift = 48;
/* CPU 0 starts with disabled MMU */
@@ -243,7 +245,8 @@ void __iomem *__ioremap(phys_addr_t phys_addr, size_t size)
{
phys_addr_t paddr_aligned = phys_addr & PAGE_MASK;
phys_addr_t paddr_end = PAGE_ALIGN(phys_addr + size);
- pgprot_t prot = __pgprot(PTE_UNCACHED | PTE_USER | PTE_UXN | PTE_PXN);
+ pgprot_t prot = __pgprot(PTE_UNCACHED | PTE_USER | PTE_UXN |
+ PTE_PXN | PTE_NS_SHARED);
pgd_t *pgtable;
assert(sizeof(long) == 8 || !(phys_addr >> 32));
@@ -21,6 +21,13 @@
#include <linux/compiler.h>
+extern unsigned long prot_ns_shared;
+/*
+ * The Non-secure shared bit for Realms is actually part of the output
+ * address, however it is modeled as a PTE attribute.
+*/
+#define PTE_NS_SHARED (prot_ns_shared)
+
/*
* Highest possible physical address supported.
*/