From patchwork Wed Apr 24 15:49:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13642077 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE544161B58 for ; Wed, 24 Apr 2024 15:37:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713973042; cv=none; b=nhYIurhziLTMWL+yv2cw6WtRlocYl0x2Vn1yUmZ2saVuV6iauUx5wxStIouqnigpI99yoVVtiNB9cQEhDQQeHuaLXgElfkhnnnBc0HpPCPyHMwaqFGW5ssY+IQmakpwiTcF5C5TiKVGxjTHAFoIshfPJH6WQPlxY2c0ZjlXzksM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713973042; c=relaxed/simple; bh=2cHMC5a5BJRlD/PsC4aspwTroLUP40TmuAMHURKso6g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=U1EKmyO+ft6Vb1Wm1x6bNJwvYj3cgzQKxWCZ6byuIBTSkzqrovJhjMixDGI4HCqxziIYErlJaufTffRG6o9BTRIX2z6ERBtXw61g3+F6orFrs6C3ega3SKAJhm6bPWum4DIvW+BoKwBnllSyPn5+41ZvHhGCrPQK7oXWh/X7tXM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kHOdv/1X; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kHOdv/1X" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713973041; x=1745509041; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2cHMC5a5BJRlD/PsC4aspwTroLUP40TmuAMHURKso6g=; b=kHOdv/1XENfEfBtMJtwVoUpL7dcC2feHwI/EhNsABKHN6H/5NE4GHblT x4x61e8msxNuQ3ch8Q4m+l3kKw2mx6uPeDdjiLy+XETSs2KmblFr8TZxE EiRPDq88CpdysdcPNQzDUfGDl56V5Xfn06RQZYkvV0ebDvj33wAHxo73+ 4ZCPd3mrUz6TcxjMp2JFXDlNV+q1cPc8lDnVSwDHzL6oQ0IWqLNPeivxm mX4Dq7Abh6huF7yTJAwXnk0MXL6FcSA8nM6gE0i43J2U/R68zdWS+plU6 uKoj0vfkGC7Mu+hXr03fYUjxWsQXS/3MTT+xkQQ9ujuwUQ7kH4QFviuxE Q==; X-CSE-ConnectionGUID: xypwkZXeSeaAfgi08wUhzQ== X-CSE-MsgGUID: Dnkkb8QLSmCGmSlHrj/FWg== X-IronPort-AV: E=McAfee;i="6600,9927,11054"; a="12545808" X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="12545808" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2024 08:37:20 -0700 X-CSE-ConnectionGUID: cJsLI/nlRLaWYSQKo5QbtQ== X-CSE-MsgGUID: GGRoCTakS4inJxEXIpq/RQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,226,1708416000"; d="scan'208";a="25363333" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 24 Apr 2024 08:37:16 -0700 From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Eric Blake , Markus Armbruster , Marcelo Tosatti , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Babu Moger , Xiaoyao Li , Dapeng Mi , Yongwei Ma , Zhao Liu Subject: [PATCH v11 17/21] tests: Add test case of APIC ID for module level parsing Date: Wed, 24 Apr 2024 23:49:25 +0800 Message-Id: <20240424154929.1487382-18-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240424154929.1487382-1-zhao1.liu@intel.com> References: <20240424154929.1487382-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhuocheng Ding After i386 supports module level, it's time to add the test for module level's parsing. Signed-off-by: Zhuocheng Ding Co-developed-by: Zhao Liu Signed-off-by: Zhao Liu Reviewed-by: Yanan Wang Tested-by: Babu Moger Tested-by: Yongwei Ma Acked-by: Michael S. Tsirkin --- tests/unit/test-x86-topo.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/tests/unit/test-x86-topo.c b/tests/unit/test-x86-topo.c index f21b8a5d95c2..55b731ccae55 100644 --- a/tests/unit/test-x86-topo.c +++ b/tests/unit/test-x86-topo.c @@ -37,6 +37,7 @@ static void test_topo_bits(void) topo_info = (X86CPUTopoInfo) {1, 1, 1, 1}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 0); g_assert_cmpuint(apicid_core_width(&topo_info), ==, 0); + g_assert_cmpuint(apicid_module_width(&topo_info), ==, 0); g_assert_cmpuint(apicid_die_width(&topo_info), ==, 0); topo_info = (X86CPUTopoInfo) {1, 1, 1, 1}; @@ -74,13 +75,22 @@ static void test_topo_bits(void) topo_info = (X86CPUTopoInfo) {1, 1, 33, 2}; g_assert_cmpuint(apicid_core_width(&topo_info), ==, 6); - topo_info = (X86CPUTopoInfo) {1, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {1, 6, 30, 2}; + g_assert_cmpuint(apicid_module_width(&topo_info), ==, 3); + topo_info = (X86CPUTopoInfo) {1, 7, 30, 2}; + g_assert_cmpuint(apicid_module_width(&topo_info), ==, 3); + topo_info = (X86CPUTopoInfo) {1, 8, 30, 2}; + g_assert_cmpuint(apicid_module_width(&topo_info), ==, 3); + topo_info = (X86CPUTopoInfo) {1, 9, 30, 2}; + g_assert_cmpuint(apicid_module_width(&topo_info), ==, 4); + + topo_info = (X86CPUTopoInfo) {1, 6, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 0); - topo_info = (X86CPUTopoInfo) {2, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {2, 6, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 1); - topo_info = (X86CPUTopoInfo) {3, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {3, 6, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 2); - topo_info = (X86CPUTopoInfo) {4, 1, 30, 2}; + topo_info = (X86CPUTopoInfo) {4, 6, 30, 2}; g_assert_cmpuint(apicid_die_width(&topo_info), ==, 2); /* build a weird topology and see if IDs are calculated correctly @@ -91,6 +101,7 @@ static void test_topo_bits(void) topo_info = (X86CPUTopoInfo) {1, 1, 6, 3}; g_assert_cmpuint(apicid_smt_width(&topo_info), ==, 2); g_assert_cmpuint(apicid_core_offset(&topo_info), ==, 2); + g_assert_cmpuint(apicid_module_offset(&topo_info), ==, 5); g_assert_cmpuint(apicid_die_offset(&topo_info), ==, 5); g_assert_cmpuint(apicid_pkg_offset(&topo_info), ==, 5);