| Message ID | 20240520175925.1217334-5-seanjc@google.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | x86/cpu: KVM: Clean up PAT and VMX macros | expand |
On 5/21/2024 1:59 AM, Sean Christopherson wrote: > From: Xin Li <xin3.li@intel.com> > > Move the bit defines for MSR_IA32_VMX_BASIC from msr-index.h to vmx.h so > that they are colocated with other VMX MSR bit defines, and with the > helpers that extract specific information from an MSR_IA32_VMX_BASIC value. > > Opportunistically use BIT_ULL() instead of open coding hex values. > > Opportunistically rename VMX_BASIC_64 to VMX_BASIC_32BIT_PHYS_ADDR_ONLY, > as "VMX_BASIC_64" is widly misleading. The flag enumerates that addresses > are limited to 32 bits, not that 64-bit addresses are allowed. > > Cc: Shan Kang <shan.kang@intel.com> > Cc: Kai Huang <kai.huang@intel.com> > Signed-off-by: Xin Li <xin3.li@intel.com> > [sean: split to separate patch, write changelog] > Reviewed-by: Zhao Liu <zhao1.liu@intel.com> > Reviewed-by: Kai Huang <kai.huang@intel.com> > Signed-off-by: Sean Christopherson <seanjc@google.com> > --- > arch/x86/include/asm/msr-index.h | 8 -------- > arch/x86/include/asm/vmx.h | 7 +++++++ > 2 files changed, 7 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index b14434af00df..7e7cad59e552 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -1168,14 +1168,6 @@ > #define MSR_IA32_VMX_VMFUNC 0x00000491 > #define MSR_IA32_VMX_PROCBASED_CTLS3 0x00000492 > > -/* VMX_BASIC bits and bitmasks */ > -#define VMX_BASIC_VMCS_SIZE_SHIFT 32 > -#define VMX_BASIC_TRUE_CTLS (1ULL << 55) > -#define VMX_BASIC_64 0x0001000000000000LLU > -#define VMX_BASIC_MEM_TYPE_SHIFT 50 > -#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU VMX_BASIC_MEM_TYPE_MASK gets deleted. It deserves to be mentioned? > -#define VMX_BASIC_INOUT 0x0040000000000000LLU > - > /* Resctrl MSRs: */ > /* - Intel: */ > #define MSR_IA32_L3_QOS_CFG 0xc81 > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > index e531d8d80a11..81b986e501a9 100644 > --- a/arch/x86/include/asm/vmx.h > +++ b/arch/x86/include/asm/vmx.h > @@ -135,6 +135,13 @@ > #define VMX_VMFUNC_EPTP_SWITCHING VMFUNC_CONTROL_BIT(EPTP_SWITCHING) > #define VMFUNC_EPTP_ENTRIES 512 > > +#define VMX_BASIC_VMCS_SIZE_SHIFT 32 > +#define VMX_BASIC_32BIT_PHYS_ADDR_ONLY BIT_ULL(48) > +#define VMX_BASIC_DUAL_MONITOR_TREATMENT BIT_ULL(49) why add it? > +#define VMX_BASIC_MEM_TYPE_SHIFT 50 > +#define VMX_BASIC_INOUT BIT_ULL(54) > +#define VMX_BASIC_TRUE_CTLS BIT_ULL(55) > + > static inline u32 vmx_basic_vmcs_revision_id(u64 vmx_basic) > { > return vmx_basic & GENMASK_ULL(30, 0);
On 5/22/2024 2:48 PM, Xiaoyao Li wrote: >> +#define VMX_BASIC_DUAL_MONITOR_TREATMENT BIT_ULL(49) > > why add it? It gets used in Patch 6. So either mention it in change log, or move it to patch 6.
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index b14434af00df..7e7cad59e552 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1168,14 +1168,6 @@ #define MSR_IA32_VMX_VMFUNC 0x00000491 #define MSR_IA32_VMX_PROCBASED_CTLS3 0x00000492 -/* VMX_BASIC bits and bitmasks */ -#define VMX_BASIC_VMCS_SIZE_SHIFT 32 -#define VMX_BASIC_TRUE_CTLS (1ULL << 55) -#define VMX_BASIC_64 0x0001000000000000LLU -#define VMX_BASIC_MEM_TYPE_SHIFT 50 -#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU -#define VMX_BASIC_INOUT 0x0040000000000000LLU - /* Resctrl MSRs: */ /* - Intel: */ #define MSR_IA32_L3_QOS_CFG 0xc81 diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index e531d8d80a11..81b986e501a9 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -135,6 +135,13 @@ #define VMX_VMFUNC_EPTP_SWITCHING VMFUNC_CONTROL_BIT(EPTP_SWITCHING) #define VMFUNC_EPTP_ENTRIES 512 +#define VMX_BASIC_VMCS_SIZE_SHIFT 32 +#define VMX_BASIC_32BIT_PHYS_ADDR_ONLY BIT_ULL(48) +#define VMX_BASIC_DUAL_MONITOR_TREATMENT BIT_ULL(49) +#define VMX_BASIC_MEM_TYPE_SHIFT 50 +#define VMX_BASIC_INOUT BIT_ULL(54) +#define VMX_BASIC_TRUE_CTLS BIT_ULL(55) + static inline u32 vmx_basic_vmcs_revision_id(u64 vmx_basic) { return vmx_basic & GENMASK_ULL(30, 0);