diff mbox series

[v4,6/6] hvf: arm: Do not advance PC when raising an exception

Message ID 20240720-pmu-v4-6-2a2b28f6b08f@daynix.com (mailing list archive)
State New, archived
Headers show
Series target/arm/kvm: Report PMU unavailability | expand

Commit Message

Akihiko Odaki July 20, 2024, 9:30 a.m. UTC
This is identical with commit 30a1690f2402 ("hvf: arm: Do not advance
PC when raising an exception") but for writes instead of reads.

Fixes: a2260983c655 ("hvf: arm: Add support for GICv3")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 target/arm/hvf/hvf.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Michael Tokarev Aug. 2, 2024, 6:41 a.m. UTC | #1
20.07.2024 12:30, Akihiko Odaki wrote:
> This is identical with commit 30a1690f2402 ("hvf: arm: Do not advance
> PC when raising an exception") but for writes instead of reads.
> 
> Fixes: a2260983c655 ("hvf: arm: Add support for GICv3")
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>

Is it -stable material (together with 30a1690f2402) ?

Thanks,

/mjt

> ---
>   target/arm/hvf/hvf.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
> index adcdfae0b17f..c1496ad5be9b 100644
> --- a/target/arm/hvf/hvf.c
> +++ b/target/arm/hvf/hvf.c
> @@ -1586,10 +1586,10 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
>       case SYSREG_ICC_SGI1R_EL1:
>       case SYSREG_ICC_SRE_EL1:
>           /* Call the TCG sysreg handler. This is only safe for GICv3 regs. */
> -        if (!hvf_sysreg_write_cp(cpu, reg, val)) {
> -            hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized());
> +        if (hvf_sysreg_write_cp(cpu, reg, val)) {
> +            return 0;
>           }
> -        return 0;
> +        break;
>       case SYSREG_MDSCR_EL1:
>           env->cp15.mdscr_el1 = val;
>           return 0;
>
Akihiko Odaki Aug. 2, 2024, 6:44 a.m. UTC | #2
On 2024/08/02 15:41, Michael Tokarev wrote:
> 20.07.2024 12:30, Akihiko Odaki wrote:
>> This is identical with commit 30a1690f2402 ("hvf: arm: Do not advance
>> PC when raising an exception") but for writes instead of reads.
>>
>> Fixes: a2260983c655 ("hvf: arm: Add support for GICv3")
>> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> 
> Is it -stable material (together with 30a1690f2402) ?

The fixed bugs are trivial, and probably nobody is actually impacted by 
them.

Regards,
Akihiko Odaki
Michael Tokarev Aug. 2, 2024, 7:32 a.m. UTC | #3
02.08.2024 09:44, Akihiko Odaki wrote:
> On 2024/08/02 15:41, Michael Tokarev wrote:
>> 20.07.2024 12:30, Akihiko Odaki wrote:
>>> This is identical with commit 30a1690f2402 ("hvf: arm: Do not advance
>>> PC when raising an exception") but for writes instead of reads.
>>>
>>> Fixes: a2260983c655 ("hvf: arm: Add support for GICv3")
>>> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
>>
>> Is it -stable material (together with 30a1690f2402) ?
> 
> The fixed bugs are trivial, and probably nobody is actually impacted by them.

The famous last words.. But okay, I'm not picking these up :)

Thanks,

/mjt
diff mbox series

Patch

diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index adcdfae0b17f..c1496ad5be9b 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1586,10 +1586,10 @@  static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)
     case SYSREG_ICC_SGI1R_EL1:
     case SYSREG_ICC_SRE_EL1:
         /* Call the TCG sysreg handler. This is only safe for GICv3 regs. */
-        if (!hvf_sysreg_write_cp(cpu, reg, val)) {
-            hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized());
+        if (hvf_sysreg_write_cp(cpu, reg, val)) {
+            return 0;
         }
-        return 0;
+        break;
     case SYSREG_MDSCR_EL1:
         env->cp15.mdscr_el1 = val;
         return 0;