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Jones" , Joel Stanley , Kevin Wolf , Paolo Bonzini , qemu-arm@nongnu.org, Corey Minyard , Eric Farman , Thomas Huth , Keith Busch , WANG Xuerui , Hyman Huang , Stefan Berger , Michael Rolnik , Alistair Francis , =?utf-8?q?Marc-Andr=C3=A9_Lure?= =?utf-8?q?au?= , Markus Armbruster , Sriram Yagnaraman , Palmer Dabbelt , qemu-riscv@nongnu.org, Ani Sinha , Halil Pasic , Jesper Devantier , Laurent Vivier , Peter Maydell , Igor Mammedov , kvm@vger.kernel.org, =?utf-8?q?Alex_Be?= =?utf-8?q?nn=C3=A9e?= , Richard Henderson , Fam Zheng , qemu-s390x@nongnu.org, Hanna Reitz , Nicholas Piggin , Eduardo Habkost , Laurent Vivier , Rob Herring , Marcel Apfelbaum , qemu-block@nongnu.org, "Maciej S. Szmigiero" , qemu-ppc@nongnu.org, Daniel Henrique Barboza , Christian Borntraeger , Harsh Prateek Bora , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Nina Schoetterl-Glausch , "Michael S. Tsirkin" , Fabiano Rosas , Helge Deller , Dmitry Fleytman , Daniel Henrique Barboza , Akihiko Odaki , Marcelo Tosatti , David Gibson , Aurelien Jarno , Liu Zhiwei , Yanan Wang , Peter Xu , Bin Meng , Weiwei Li , Klaus Jensen , Jean-Christophe Dubois , Jason Wang , Pierrick Bouvier Subject: [PATCH 34/39] target/riscv: remove break after g_assert_not_reached() Date: Tue, 10 Sep 2024 15:16:01 -0700 Message-Id: <20240910221606.1817478-35-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240910221606.1817478-1-pierrick.bouvier@linaro.org> References: <20240910221606.1817478-1-pierrick.bouvier@linaro.org> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Pierrick Bouvier Reviewed-by: Daniel Henrique Barboza --- target/riscv/monitor.c | 1 - target/riscv/insn_trans/trans_rvv.c.inc | 2 -- 2 files changed, 3 deletions(-) diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index f5b1ffe6c3e..100005ea4e9 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -184,7 +184,6 @@ static void mem_info_svxx(Monitor *mon, CPUArchState *env) break; default: g_assert_not_reached(); - break; } /* calculate virtual address bits */ diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 3a3896ba06c..f8928c44a8b 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3172,7 +3172,6 @@ static void load_element(TCGv_i64 dest, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } } @@ -3257,7 +3256,6 @@ static void store_element(TCGv_i64 val, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } }