| Message ID | 20240912-iocsr-v2-2-e88f75b37da4@flygoat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | LoongArch, MIPS: Unify Loongson IOCSR handling | expand |
在2024年9月12日九月 下午9:55，Jiaxun Yang写道： [...] > + > + if (c->options & LOONGARCH_CPU_IOCSR) > + return; Oops, typo here, there should be a not :-( Huacai, if the series is ok for you please fix this when applying the patch. I only tested against NEMU so didn't catch this :-( Thanks - Jiaxun > + > + *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR); > + *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); > + > + if (!__cpu_full_name[cpu]) > + __cpu_full_name[cpu] = cpu_full_name; > + > + config = iocsr_read32(LOONGARCH_IOCSR_FEATURES); > + if (config & IOCSRF_CSRIPI) > + c->options |= LOONGARCH_CPU_CSRIPI; > + if (config & IOCSRF_EXTIOI) > + c->options |= LOONGARCH_CPU_EXTIOI; > + if (config & IOCSRF_FREQSCALE) > + c->options |= LOONGARCH_CPU_SCALEFREQ; > + if (config & IOCSRF_FLATMODE) > + c->options |= LOONGARCH_CPU_FLATMODE; > + if (config & IOCSRF_EIODECODE) > + c->options |= LOONGARCH_CPU_EIODECODE; > + if (config & IOCSRF_AVEC) > + c->options |= LOONGARCH_CPU_AVECINT; > + if (config & IOCSRF_VM) > + c->options |= LOONGARCH_CPU_HYPERVISOR; > } > > #ifdef CONFIG_64BIT > > -- > 2.46.0
Hi, Jiaxun, On Fri, Sep 13, 2024 at 4:59 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote: > > > > 在2024年9月12日九月 下午9:55，Jiaxun Yang写道： > [...] > > + > > + if (c->options & LOONGARCH_CPU_IOCSR) > > + return; > Oops, typo here, there should be a not :-( > > Huacai, if the series is ok for you please fix this when applying > the patch. I only tested against NEMU so didn't catch this :-( Since the first patch can also be improved, you can improve this one by yourself. And from my point of view the two patches can be combined to one. Huacai > > Thanks > - Jiaxun > > > + > > + *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR); > > + *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); > > + > > + if (!__cpu_full_name[cpu]) > > + __cpu_full_name[cpu] = cpu_full_name; > > + > > + config = iocsr_read32(LOONGARCH_IOCSR_FEATURES); > > + if (config & IOCSRF_CSRIPI) > > + c->options |= LOONGARCH_CPU_CSRIPI; > > + if (config & IOCSRF_EXTIOI) > > + c->options |= LOONGARCH_CPU_EXTIOI; > > + if (config & IOCSRF_FREQSCALE) > > + c->options |= LOONGARCH_CPU_SCALEFREQ; > > + if (config & IOCSRF_FLATMODE) > > + c->options |= LOONGARCH_CPU_FLATMODE; > > + if (config & IOCSRF_EIODECODE) > > + c->options |= LOONGARCH_CPU_EIODECODE; > > + if (config & IOCSRF_AVEC) > > + c->options |= LOONGARCH_CPU_AVECINT; > > + if (config & IOCSRF_VM) > > + c->options |= LOONGARCH_CPU_HYPERVISOR; > > } > > > > #ifdef CONFIG_64BIT > > > > -- > > 2.46.0 > > -- > - Jiaxun
diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c index 5dc8ca3c4387..d1a9bb77145f 100644 --- a/arch/loongarch/kernel/cpu-probe.c +++ b/arch/loongarch/kernel/cpu-probe.c @@ -182,22 +182,6 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c) if (config & CPUCFG6_PMP) c->options |= LOONGARCH_CPU_PMP; - config = iocsr_read32(LOONGARCH_IOCSR_FEATURES); - if (config & IOCSRF_CSRIPI) - c->options |= LOONGARCH_CPU_CSRIPI; - if (config & IOCSRF_EXTIOI) - c->options |= LOONGARCH_CPU_EXTIOI; - if (config & IOCSRF_FREQSCALE) - c->options |= LOONGARCH_CPU_SCALEFREQ; - if (config & IOCSRF_FLATMODE) - c->options |= LOONGARCH_CPU_FLATMODE; - if (config & IOCSRF_EIODECODE) - c->options |= LOONGARCH_CPU_EIODECODE; - if (config & IOCSRF_AVEC) - c->options |= LOONGARCH_CPU_AVECINT; - if (config & IOCSRF_VM) - c->options |= LOONGARCH_CPU_HYPERVISOR; - config = csr_read32(LOONGARCH_CSR_ASID); config = (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT; asid_mask = GENMASK(config - 1, 0); @@ -240,15 +224,10 @@ static char cpu_full_name[MAX_NAME_LEN] = " - "; static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int cpu) { + uint32_t config; + const char *core_name = "Unknown"; uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]); uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]); - const char *core_name = "Unknown"; - - if (!__cpu_full_name[cpu]) - __cpu_full_name[cpu] = cpu_full_name; - - *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR); - *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); switch (c->processor_id & PRID_SERIES_MASK) { case PRID_SERIES_LA132: @@ -290,6 +269,31 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int } pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name); + + if (c->options & LOONGARCH_CPU_IOCSR) + return; + + *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR); + *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); + + if (!__cpu_full_name[cpu]) + __cpu_full_name[cpu] = cpu_full_name; + + config = iocsr_read32(LOONGARCH_IOCSR_FEATURES); + if (config & IOCSRF_CSRIPI) + c->options |= LOONGARCH_CPU_CSRIPI; + if (config & IOCSRF_EXTIOI) + c->options |= LOONGARCH_CPU_EXTIOI; + if (config & IOCSRF_FREQSCALE) + c->options |= LOONGARCH_CPU_SCALEFREQ; + if (config & IOCSRF_FLATMODE) + c->options |= LOONGARCH_CPU_FLATMODE; + if (config & IOCSRF_EIODECODE) + c->options |= LOONGARCH_CPU_EIODECODE; + if (config & IOCSRF_AVEC) + c->options |= LOONGARCH_CPU_AVECINT; + if (config & IOCSRF_VM) + c->options |= LOONGARCH_CPU_HYPERVISOR; } #ifdef CONFIG_64BIT
IOCSR register definition appears to be a platform specific spec instead of architecture spec, even for Loongson CPUs there is no guarantee that IOCSR will always present. Thus it's dangerous to perform IOCSR probing without checking CPU type and instruction availability. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/loongarch/kernel/cpu-probe.c | 50 +++++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 23 deletions(-)