@@ -79,19 +79,20 @@ static void cpu_core_instance_init(Object *obj)
static void cpu_core_class_init(ObjectClass *oc, void *data)
{
- DeviceClass *dc = DEVICE_CLASS(oc);
+ CPUTopoClass *tc = CPU_TOPO_CLASS(oc);
- set_bit(DEVICE_CATEGORY_CPU, dc->categories);
+ /* TODO: Offload "core-id" and "nr-threads" to ppc-specific core. */
object_class_property_add(oc, "core-id", "int", core_prop_get_core_id,
core_prop_set_core_id, NULL, NULL);
object_class_property_add(oc, "nr-threads", "int", core_prop_get_nr_threads,
core_prop_set_nr_threads, NULL, NULL);
+
+ tc->level = CPU_TOPOLOGY_LEVEL_CORE;
}
static const TypeInfo cpu_core_type_info = {
.name = TYPE_CPU_CORE,
- .parent = TYPE_DEVICE,
- .abstract = true,
+ .parent = TYPE_CPU_TOPO,
.class_init = cpu_core_class_init,
.instance_size = sizeof(CPUCore),
.instance_init = cpu_core_instance_init,
@@ -356,6 +356,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
assert(pc->chip);
+ pcc->parent_realize(dev, errp);
+
pc->threads = g_new(PowerPCCPU *, cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
PowerPCCPU *cpu;
@@ -466,11 +468,18 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
static void pnv_core_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
- dc->realize = pnv_core_realize;
dc->unrealize = pnv_core_unrealize;
device_class_set_props(dc, pnv_core_properties);
dc->user_creatable = false;
+ device_class_set_parent_realize(dc, pnv_core_realize,
+ &pcc->parent_realize);
+ /*
+ * Avoid ppc that do not support topology device trees from
+ * encountering error when creating cores.
+ */
+ dc->bus_type = NULL;
}
#define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
@@ -338,6 +338,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
(SpaprMachineState *) object_dynamic_cast(qdev_get_machine(),
TYPE_SPAPR_MACHINE);
SpaprCpuCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
+ SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(sc);
CPUCore *cc = CPU_CORE(OBJECT(dev));
int i;
@@ -346,6 +347,8 @@ static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
return;
}
+ scc->parent_realize(dev, errp);
+
qemu_register_reset(spapr_cpu_core_reset_handler, sc);
sc->threads = g_new0(PowerPCCPU *, cc->nr_threads);
for (i = 0; i < cc->nr_threads; i++) {
@@ -376,11 +379,18 @@ static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
- dc->realize = spapr_cpu_core_realize;
dc->unrealize = spapr_cpu_core_unrealize;
device_class_set_legacy_reset(dc, spapr_cpu_core_reset);
device_class_set_props(dc, spapr_cpu_core_properties);
+ dc->hotpluggable = true;
scc->cpu_type = data;
+ device_class_set_parent_realize(dc, spapr_cpu_core_realize,
+ &scc->parent_realize);
+ /*
+ * Avoid ppc that do not support topology device trees from
+ * encountering error when creating cores.
+ */
+ dc->bus_type = NULL;
}
#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
@@ -9,6 +9,7 @@
#ifndef HW_CPU_CORE_H
#define HW_CPU_CORE_H
+#include "hw/cpu/cpu-topology.h"
#include "hw/qdev-core.h"
#include "qom/object.h"
@@ -18,7 +19,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(CPUCore, CPU_CORE)
struct CPUCore {
/*< private >*/
- DeviceState parent_obj;
+ CPUTopoState parent_obj;
/*< public >*/
int core_id;
@@ -71,10 +71,11 @@ struct PnvCore {
};
struct PnvCoreClass {
- DeviceClass parent_class;
+ CPUTopoClass parent_class;
const MemoryRegionOps *xscom_ops;
uint64_t xscom_size;
+ DeviceRealize parent_realize;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
@@ -32,8 +32,10 @@ struct SpaprCpuCore {
};
struct SpaprCpuCoreClass {
- DeviceClass parent_class;
+ CPUTopoClass parent_class;
+
const char *cpu_type;
+ DeviceRealize parent_realize;
};
const char *spapr_get_cpu_core_type(const char *cpu_type);
Convert cpu-core to topology device then it can be added into topology tree. At present, only PPC is using cpu-core device. For topology tree, it's necessary to add cpu-core in the tree as one of the topology hierarchies. The generic cpu-core is sufficient to express the core layer in a topology tree without needing to consider any arch-specific feature, so to reduce the support complexity of the topology tree and allow arch to be able to use the abstract cpu-core directly, without further derivation of the arch-specific core, remove the "abstract" restriction from TypeInfo. Because cpu-core then inherits properties and settings of topology device, also make the following changes to take into account the special case for cpu-core: * Omit setting category since topology device has already set. * Make realize() of topology device as the parent realize() for PPC cores. * Set cpu-core's topology level as core. * Mask bus_type for PPC cores as NULL to avoid PPC cores' creation failure since PPC currently doesn't support topology tree. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> --- hw/cpu/core.c | 9 +++++---- hw/ppc/pnv_core.c | 11 ++++++++++- hw/ppc/spapr_cpu_core.c | 12 +++++++++++- include/hw/cpu/core.h | 3 ++- include/hw/ppc/pnv_core.h | 3 ++- include/hw/ppc/spapr_cpu_core.h | 4 +++- 6 files changed, 33 insertions(+), 9 deletions(-)