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Fri, 20 Sep 2024 15:34:59 -0700 From: Zhi Wang To: , CC: , , , , , , , , , , , , , , , , , , , Subject: [RFC 07/13] vfio/cxl: introduce vfio_cxl_core_{read, write}() Date: Fri, 20 Sep 2024 15:34:40 -0700 Message-ID: <20240920223446.1908673-8-zhiw@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240920223446.1908673-1-zhiw@nvidia.com> References: <20240920223446.1908673-1-zhiw@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029928:EE_|PH7PR12MB5903:EE_ X-MS-Office365-Filtering-Correlation-Id: e77516d8-f883-40b8-a900-08dcd9c47f2a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024|7416014; X-Microsoft-Antispam-Message-Info: yP/8Bjf9ZzPlcZDrax67rK8qe/WhXEz2m2MHpII7D0n/xzZmjVJiu7y/ViOo2pgBeahLKxyEZzXsxLAlO13tUMn78dLi1cR4Ba54jNlapW+GHMbe+reKmuyos3zrVT013XoDKPw/366V4+JuRXyClej/hjUmJX5+sMCfbdYEM95uhvYGiJjM+ufW0h/uP309xgn9JTOyIKuMPzlGheJL0Byn+WEnj6LOUSmYk9scFNYfztT12dm5G+zFScl8jlF+ZuVTUakHL3qTEY/EA+PlK2LABb5/WGPwxq+NFsEMgxGeTDGQlYKywFs0Jhet+uFwmRFVSRslBnIBD6rQhokrNzvqsKRG5gYxM7MxlclVZzXJ4Wb3oolFj38HsH0jLj2NFWpZFL3VKKTnuRyZXD5svvV1KabA9GwSnsaowE8S5Fqp+NhVbze0bQpKuu6uKYLuVXDAcc7FbcvVBJrtL+wT6EdmO1FKZYFDBquBsqxLFqMYdswnYiYaPIijhRNQFeHyoqfRzn2c3KXxzhGzLuknCk3/HVfzVvqJUc6af84BEyPaBtR1PCc1/KAwYaJ0J00xlOHKPBO8ZzNChrz5Yq61pGu8GRUiYcllodc6hbQQHBwnpMyn7YJJlNaKUtuekIejb+0eWMWKrjaW7XcVgNPTh8/0XbWA1pZSOlzKQArrxlNcsZ/BIUn+B6zoAuTnHgTqi6b+TupKfFX5lEPzwDEfjqhPDXU3X+mZe6WCC8HhxwBIlBMa9OqVQn8/isK4pneCFOHpnR6c5bjarmoCs2Ccl8l1MAZRmETXfsmS9FVhwkLqytD/VPTjUtRmqIDGVd8EUPpXMTBG373oQyaIkTLmXLrvO3kWVOF/SrcTRUCIXAl6MJjOPvQoGaK/LlPPaVlbQqgSsjBhZQzaGBOiRA8mt+gn6dQld3Mr/lVsBfteMufUAXP4KYPntd7Avs5mLhfP2hn7eodAc4TWkgjKvYD4he13V2GkR0dwZPRdbGJMHzLHQFvMnGZjfFGK6Fx+gCd59ZXE25S21ssBmu7l/lHRO3uMPI4G7Wp+VZbkkerGHaXE5ogVLwbT6+Ol625VN/EZp66EUQBMTvekKU1+yy7kU4g4HmJTBjVvy4kGiM1ojuirtWPXgD3n1GARAVHYNIbzEGSl9Id69MJmH/3gFAzg5rUBwdBmfe5HZ6Tkk1xMoh73fLxz6qlmmAo4p+UHwkmMWmTtqe/eQHbO06yuKa4N/uR34sUvG7Bv4wLb8vxP+wo89wLy7ckci58DHrmvWXUKlhjIBBb1emgDcOA3Pi7KSnZDmOnL0rnQLeJuRpKm5f7RFwJRjuOYj6v6sNp8xgNvh3zoXVkHZTORpfzINq4/60MXJU6oxcy2GdpAovFc8+03+mjizaOOXre/DjgffV1pltfTqXEYwWj32CxWzm4wE5+Cnyo1gCgTXSn7e4Nr/JeDcq0ABGdI290T2fWoEchN X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2024 22:35:14.8056 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e77516d8-f883-40b8-a900-08dcd9c47f2a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029928.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5903 The read/write callbacks in vfio_device_ops is for accessing the device when mmap is not support. It is also used for VFIO variant driver to emulate the device registers. CXL spec illusrates the standard programming interface, part of them are MMIO registers sit in a PCI BAR. Some of them are emulated when passing the CXL type-2 device to the VM. E.g. HDM decoder registers are emulated. Introduce vfio_cxl_core_{read, write}() in the vfio-cxl-core to prepare for emulating the CXL MMIO registers in the PCI BAR. Signed-off-by: Zhi Wang --- drivers/vfio/pci/vfio_cxl_core.c | 20 ++++++++++++++++++++ include/linux/vfio_pci_core.h | 5 +++++ 2 files changed, 25 insertions(+) diff --git a/drivers/vfio/pci/vfio_cxl_core.c b/drivers/vfio/pci/vfio_cxl_core.c index ffc15fd94b22..68a935515256 100644 --- a/drivers/vfio/pci/vfio_cxl_core.c +++ b/drivers/vfio/pci/vfio_cxl_core.c @@ -396,6 +396,26 @@ void vfio_cxl_core_set_driver_hdm_cap(struct vfio_pci_core_device *core_dev) } EXPORT_SYMBOL(vfio_cxl_core_set_driver_hdm_cap); +ssize_t vfio_cxl_core_read(struct vfio_device *core_vdev, char __user *buf, + size_t count, loff_t *ppos) +{ + struct vfio_pci_core_device *vdev = + container_of(core_vdev, struct vfio_pci_core_device, vdev); + + return vfio_pci_rw(vdev, buf, count, ppos, false); +} +EXPORT_SYMBOL_GPL(vfio_cxl_core_read); + +ssize_t vfio_cxl_core_write(struct vfio_device *core_vdev, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct vfio_pci_core_device *vdev = + container_of(core_vdev, struct vfio_pci_core_device, vdev); + + return vfio_pci_rw(vdev, (char __user *)buf, count, ppos, true); +} +EXPORT_SYMBOL_GPL(vfio_cxl_core_write); + MODULE_LICENSE("GPL"); MODULE_AUTHOR(DRIVER_AUTHOR); MODULE_DESCRIPTION(DRIVER_DESC); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 62fa0f54a567..64ccdcdfa95e 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -199,4 +199,9 @@ void vfio_cxl_core_set_resource(struct vfio_pci_core_device *core_dev, void vfio_cxl_core_set_region_size(struct vfio_pci_core_device *core_dev, u64 size); void vfio_cxl_core_set_driver_hdm_cap(struct vfio_pci_core_device *core_dev); +ssize_t vfio_cxl_core_read(struct vfio_device *core_vdev, char __user *buf, + size_t count, loff_t *ppos); +ssize_t vfio_cxl_core_write(struct vfio_device *core_vdev, const char __user *buf, + size_t count, loff_t *ppos); + #endif /* VFIO_PCI_CORE_H */