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Sun, 22 Sep 2024 05:50:30 -0700 From: Zhi Wang To: , CC: , , , , , , , , , , , , , Subject: [RFC 17/29] nvkm/vgpu: introduce engine bitmap for vGPU Date: Sun, 22 Sep 2024 05:49:39 -0700 Message-ID: <20240922124951.1946072-18-zhiw@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240922124951.1946072-1-zhiw@nvidia.com> References: <20240922124951.1946072-1-zhiw@nvidia.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|SN7PR12MB7105:EE_ X-MS-Office365-Filtering-Correlation-Id: 546ad3a8-41ed-40ac-5659-08dcdb052e34 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: 79jMkd13FD6qI3iS7R2kvB8IweXP0jXsfFu/zzR3RmPiXIlqbRzSmnZfk2cG60/jsQWgSvpdg67yUIvkNgd3LGEvBqfRqINLaMDr7arIx9FAKkM7wELpLSf0QOQTI4f3d1QCt1PGQNneRDo0HXIt4bthjuE9n6iv5szRebwMcHUZJuxYcUnYeLXQViVQikz4SBJgJzdzpYqwDIupUWnQReAk+TcnZIoOLqVJgbW4AWbhzIwMNbX03Xktz98bNmQPXb55gh9EBPKHD3EYeyhkolL1xLBHbuLWX4uwMk2u0ki23w64c/tP1g0sxYtqRfuCwcrOAsytMCEUOEtgsVgqOo539oY39PnE6glNbhHMZ4qVaQwaVZ2jDi11rsdKxkJXc1AEfwkTTPoKU36KWSIUjm0TwlxSvZ6tfYry80tD8lvcNJjIMSgOpovlhrgqJfILzrXlhFKblv7E5AI5Gu5dwKUvTTWbrAYzIHgXRZuu79GFOyxmIU1LTPN0efn6Z49+3t8nROxg/GI/86Z/RuXvWhtDF+mrjLCIXyb/S3Dxj9eE91rgW7EwoOTH4p/nYGwe27iN8mkHjPHTe9NdW12qZcScn8NNxPhiRZ94ESgo5KqjKXXR2x8pFLn8md04/66vwR0mdy6xbFFZ24sx2RRA8fbkDjBhTkWTGeg17NJJLQIVH8eQHu7iHWEd6R5cMwqB84IMrt03q89RxIwkFOf0yBfCfa53wbRYFU00cqFXE16KOyat8ytN1HOpwM7XC/0Ti2YSm51D60VzRYxZcjSJZxdm2aJuGgPPiui/5aRfXslRYvi89Rhj7C3DzMusqTDns7Qkywh9kGwssuKcTPzEyxFjAF8H2Ow4+oseazrYVTGebjpOVcRFIjzv69X/3DMN1dU8GgosHbxPznxc7tLXS3QkUaq1cUvHxGOKuieZ0R2b/iRJB6HeY7sNnVjQgqjAbp+M4wr0p079XTAsjxxFpGvHEKyXnr9bPkUcYNpc5iCgbBDU2B2mZyGP7QNfGUt6fH93twjFVZXEou+gK1fISgzgSU8Ozzob8ZNYet00t3OIgZ6Nzr3JLJNaSqj4sAhv98Z2pfY9m4+g/9k+fjvgCxNBvPX8vJ4Ogd/do+q9TyF1EC2gbabpnC7PRmEZWI3Knj0qPQEAsamkSTP80bVZ2Dyb72DSAkPVgokCqzwd8Ji8ANnPDiWugS0x3ZMPRxuY2nq6L2HNBC54vB4NH+PkSKyXpkMeTcZ6iPhihakxaSiWp59TWQcEQ/3LiMG6DeWgCZ640h6aJGhQKO/jtPpYLkdCUj0mFOEzCFhanOmlEmztQNDgbHOVNefQdP8WQ6WEig/W1alIi8VdzYUlG3/sJ5y7E8wff3uFbzpMvs8gJcBeY8MbT0p+A6N/bhAYo7MavtYB5YXbJG+NLQTgHJatkTJDFlbbUMC1Cd7l7HnBhvZLNMM8E0PDEQYPJEFQjOZn X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2024 12:50:47.4238 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 546ad3a8-41ed-40ac-5659-08dcdb052e34 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7105 Activating a new vGPU needs to configure the allocated CHIDs of engines. Thus, an engine bitmap is required. Expose the engine bitmap to NVIDIA vGPU VFIO module to activate the new vGPU. Signed-off-by: Zhi Wang --- drivers/gpu/drm/nouveau/nvkm/vgpu_mgr/vfio.c | 15 +++++++++++++++ include/drm/nvkm_vgpu_mgr_vfio.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvkm/vgpu_mgr/vfio.c b/drivers/gpu/drm/nouveau/nvkm/vgpu_mgr/vfio.c index 535c2922d3af..84c13d678ffa 100644 --- a/drivers/gpu/drm/nouveau/nvkm/vgpu_mgr/vfio.c +++ b/drivers/gpu/drm/nouveau/nvkm/vgpu_mgr/vfio.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -248,6 +249,19 @@ static int bar1_map_mem(struct nvidia_vgpu_mem *base) return 0; } +static void get_engine_bitmap(void *handle, unsigned long *bitmap) +{ + struct nvkm_device *nvkm_dev = handle; + struct nvkm_runl *runl; + struct nvkm_engn *engn; + + nvkm_runl_foreach(runl, nvkm_dev->fifo) { + nvkm_runl_foreach_engn(engn, runl) { + __set_bit(engn->id, bitmap); + } + } +} + struct nvkm_vgpu_mgr_vfio_ops nvkm_vgpu_mgr_vfio_ops = { .vgpu_mgr_is_enabled = vgpu_mgr_is_enabled, .get_handle = get_handle, @@ -266,6 +280,7 @@ struct nvkm_vgpu_mgr_vfio_ops nvkm_vgpu_mgr_vfio_ops = { .free_fbmem = free_fbmem, .bar1_map_mem = bar1_map_mem, .bar1_unmap_mem = bar1_unmap_mem, + .get_engine_bitmap = get_engine_bitmap, }; /** diff --git a/include/drm/nvkm_vgpu_mgr_vfio.h b/include/drm/nvkm_vgpu_mgr_vfio.h index 38b4cf5786fa..d9ed2cd202ff 100644 --- a/include/drm/nvkm_vgpu_mgr_vfio.h +++ b/include/drm/nvkm_vgpu_mgr_vfio.h @@ -48,6 +48,7 @@ struct nvkm_vgpu_mgr_vfio_ops { void (*free_fbmem)(struct nvidia_vgpu_mem *mem); int (*bar1_map_mem)(struct nvidia_vgpu_mem *mem); void (*bar1_unmap_mem)(struct nvidia_vgpu_mem *mem); + void (*get_engine_bitmap)(void *handle, unsigned long *bitmap); }; struct nvkm_vgpu_mgr_vfio_ops *nvkm_vgpu_mgr_get_vfio_ops(void *handle);