@@ -82,4 +82,10 @@ static inline int nvidia_vgpu_mgr_get_handle(struct pci_dev *pdev,
#define nvidia_vgpu_mgr_free_fbmem(m, h) \
m->handle.ops->free_fbmem(h)
+#define nvidia_vgpu_mgr_bar1_map_mem(m, mem) \
+ m->handle.ops->bar1_map_mem(mem)
+
+#define nvidia_vgpu_mgr_bar1_unmap_mem(m, mem) \
+ m->handle.ops->bar1_unmap_mem(mem)
+
#endif
@@ -87,12 +87,29 @@ static int setup_chids(struct nvidia_vgpu *vgpu)
return 0;
}
+static inline u64 init_task_log_buff_offset(void)
+{
+ return (3 * SZ_4K) + SZ_2M + SZ_4K;
+}
+
+static inline u64 init_task_log_buff_size(void)
+{
+ return SZ_128K;
+}
+
+static inline u64 vgpu_task_log_buff_size(void)
+{
+ return SZ_128K;
+}
+
static void clean_mgmt_heap(struct nvidia_vgpu *vgpu)
{
struct nvidia_vgpu_mgr *vgpu_mgr = vgpu->vgpu_mgr;
struct nvidia_vgpu_mgmt *mgmt = &vgpu->mgmt;
+ nvidia_vgpu_mgr_bar1_unmap_mem(vgpu_mgr, mgmt->heap_mem);
nvidia_vgpu_mgr_free_fbmem(vgpu_mgr, mgmt->heap_mem);
+ mgmt->init_task_log_vaddr = mgmt->vgpu_task_log_vaddr = NULL;
mgmt->heap_mem = NULL;
}
@@ -103,11 +120,23 @@ static int setup_mgmt_heap(struct nvidia_vgpu *vgpu)
NVA081_CTRL_VGPU_INFO *info =
(NVA081_CTRL_VGPU_INFO *)vgpu->vgpu_type;
struct nvidia_vgpu_mem *mem;
+ int ret;
mem = nvidia_vgpu_mgr_alloc_fbmem(vgpu_mgr, info->gspHeapSize);
if (IS_ERR(mem))
return PTR_ERR(mem);
+ ret = nvidia_vgpu_mgr_bar1_map_mem(vgpu_mgr, mem);
+ if (ret) {
+ nvidia_vgpu_mgr_free_fbmem(vgpu_mgr, mem);
+ return ret;
+ }
+
+ mgmt->ctrl_vaddr = mem->bar1_vaddr;
+ mgmt->init_task_log_vaddr = mgmt->ctrl_vaddr +
+ init_task_log_buff_offset();
+ mgmt->vgpu_task_log_vaddr = mgmt->init_task_log_vaddr +
+ init_task_log_buff_size();
mgmt->heap_mem = mem;
return 0;
}
@@ -23,7 +23,9 @@ struct nvidia_vgpu_chid {
struct nvidia_vgpu_mgmt {
struct nvidia_vgpu_mem *heap_mem;
- /* more to come */
+ void __iomem *ctrl_vaddr;
+ void __iomem *init_task_log_vaddr;
+ void __iomem *vgpu_task_log_vaddr;
};
struct nvidia_vgpu {
The mgmt heap is a block of shared FB memory between the GSP firmware and the vGPU host. It is used for supporting vGPU RPCs, vGPU logging. To access the data structures of vGPU RPCs and vGPU logging, the mgmt heap FB memory needs to mapped into BAR1 and the region in the BAR1 is required to be mapped into CPU vaddr. Map the mgmt heap FB memory into BAR1 and map the related BAR1 region into CPU vaddr. Initialize the pointers to the mgmt heap FB memory. Signed-off-by: Zhi Wang <zhiw@nvidia.com> --- drivers/vfio/pci/nvidia-vgpu/nvkm.h | 6 +++++ drivers/vfio/pci/nvidia-vgpu/vgpu.c | 29 +++++++++++++++++++++++++ drivers/vfio/pci/nvidia-vgpu/vgpu_mgr.h | 4 +++- 3 files changed, 38 insertions(+), 1 deletion(-)