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[v3,3/4] KVM: X86: Add documentation about behavioral difference for KVM_EXIT_BUS_LOCK

Message ID 20241004053341.5726-4-manali.shukla@amd.com (mailing list archive)
State New
Headers show
Series Add support for the Bus Lock Threshold | expand

Commit Message

Manali Shukla Oct. 4, 2024, 5:33 a.m. UTC
Add a note about behavioral difference for KVM_EXIT_X86_BUS_LOCK
between AMD CPUs and Intel CPUs in KVM_CAP_X86_BUS_LOCK_EXIT
capability documentation.

Signed-off-by: Manali Shukla <manali.shukla@amd.com>
---
 Documentation/virt/kvm/api.rst | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index e32471977d0a..49465323dc62 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -7884,6 +7884,10 @@  Note! Detected bus locks may be coincident with other exits to userspace, i.e.
 KVM_RUN_X86_BUS_LOCK should be checked regardless of the primary exit reason if
 userspace wants to take action on all detected bus locks.
 
+Note! On AMD CPUs, the bus lock exit to user space occurs with RIP pointing at
+the offending instruction. In contrast, on Intel CPUs, the RIP points to the
+instruction right after the guilty one after the bus lock exit to user space.
+
 7.23 KVM_CAP_PPC_DAWR1
 ----------------------