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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF0001AB59.mail.protection.outlook.com (10.167.241.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8026.11 via Frontend Transport; Fri, 4 Oct 2024 05:34:04 +0000 Received: from chalupa-d178host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 4 Oct 2024 00:34:01 -0500 From: Manali Shukla To: , CC: , , , , , , , , Subject: [PATCH v3 3/4] KVM: X86: Add documentation about behavioral difference for KVM_EXIT_BUS_LOCK Date: Fri, 4 Oct 2024 05:33:40 +0000 Message-ID: <20241004053341.5726-4-manali.shukla@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241004053341.5726-1-manali.shukla@amd.com> References: <20241004053341.5726-1-manali.shukla@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB59:EE_|BY5PR12MB4051:EE_ X-MS-Office365-Filtering-Correlation-Id: 55aa22ec-0f07-402f-56ea-08dce4362918 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026|30052699003; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Oct 2024 05:34:04.7970 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 55aa22ec-0f07-402f-56ea-08dce4362918 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB59.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4051 Add a note about behavioral difference for KVM_EXIT_X86_BUS_LOCK between AMD CPUs and Intel CPUs in KVM_CAP_X86_BUS_LOCK_EXIT capability documentation. Signed-off-by: Manali Shukla --- Documentation/virt/kvm/api.rst | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index e32471977d0a..49465323dc62 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -7884,6 +7884,10 @@ Note! Detected bus locks may be coincident with other exits to userspace, i.e. KVM_RUN_X86_BUS_LOCK should be checked regardless of the primary exit reason if userspace wants to take action on all detected bus locks. +Note! On AMD CPUs, the bus lock exit to user space occurs with RIP pointing at +the offending instruction. In contrast, on Intel CPUs, the RIP points to the +instruction right after the guilty one after the bus lock exit to user space. + 7.23 KVM_CAP_PPC_DAWR1 ----------------------