diff mbox series

[v4,02/36] arm64: Remove VNCR definition for PIRE0_EL2

Message ID	20241009190019.3222687-3-maz@kernel.org (mailing list archive)
State	New
Headers	show Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E8E41E105F; Wed, 9 Oct 2024 19:00:43 +0000 (UTC) From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org Cc: Joey Gouly <joey.gouly@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Oliver Upton <oliver.upton@linux.dev>, Zenghui Yu <yuzenghui@huawei.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Mark Brown <broonie@kernel.org> Subject: [PATCH v4 02/36] arm64: Remove VNCR definition for PIRE0_EL2 Date: Wed, 9 Oct 2024 19:59:45 +0100 Message-Id: <20241009190019.3222687-3-maz@kernel.org> In-Reply-To: <20241009190019.3222687-1-maz@kernel.org> References: <20241009190019.3222687-1-maz@kernel.org> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE \| expand [v4,00/36] KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE [v4,01/36] arm64: Drop SKL0/SKL1 from TCR2_EL2 [v4,02/36] arm64: Remove VNCR definition for PIRE0_EL2 [v4,03/36] arm64: Add encoding for PIRE0_EL2 [v4,04/36] KVM: arm64: Drop useless struct s2_mmu in __kvm_at_s1e2() [v4,05/36] KVM: arm64: nv: Add missing EL2->EL1 mappings in get_el2_to_el1_mapping() [v4,06/36] KVM: arm64: nv: Handle CNTHCTL_EL2 specially [v4,07/36] KVM: arm64: nv: Save/Restore vEL2 sysregs [v4,08/36] KVM: arm64: Correctly access TCR2_EL1, PIR_EL1, PIRE0_EL1 with VHE [v4,09/36] KVM: arm64: Extend masking facility to arbitrary registers [v4,10/36] arm64: Define ID_AA64MMFR1_EL1.HAFDBS advertising FEAT_HAFT [v4,11/36] KVM: arm64: Add TCR2_EL2 to the sysreg arrays [v4,12/36] KVM: arm64: Sanitise TCR2_EL2 [v4,13/36] KVM: arm64: Add save/restore for TCR2_EL2 [v4,14/36] KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays [v4,15/36] KVM: arm64: Add save/restore for PIR{,E0}_EL2 [v4,16/36] KVM: arm64: Handle PIR{,E0}_EL2 traps [v4,17/36] KVM: arm64: Sanitise ID_AA64MMFR3_EL1 [v4,18/36] KVM: arm64: Add AT fast-path support for S1PIE [v4,19/36] KVM: arm64: Split S1 permission evaluation into direct and hierarchical parts [v4,20/36] KVM: arm64: Disable hierarchical permissions when S1PIE is enabled [v4,21/36] KVM: arm64: Implement AT S1PIE support [v4,22/36] KVM: arm64: Define helper for EL2 registers with custom visibility [v4,23/36] KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests [v4,24/36] KVM: arm64: Hide S1PIE registers from userspace when disabled for guests [v4,25/36] KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF [v4,26/36] arm64: Add encoding for POR_EL2 [v4,27/36] KVM: arm64: Add a composite EL2 visibility helper [v4,28/36] KVM: arm64: Drop bogus CPTR_EL2.E0POE trap routing [v4,29/36] KVM: arm64: Subject S1PIE/S1POE registers to HCR_EL2.{TVM,TRVM} [v4,30/36] KVM: arm64: Add basic support for POR_EL2 [v4,31/36] KVM: arm64: Add save/retore support for POR_EL2 [v4,32/36] KVM: arm64: Add POE save/restore for AT emulation fast-path [v4,33/36] KVM: arm64: Disable hierarchical permissions when POE is enabled [v4,34/36] KVM: arm64: Make PAN conditions part of the S1 walk context [v4,35/36] KVM: arm64: Handle stage-1 permission overlays [v4,36/36] KVM: arm64: Handle WXN attribute

Commit Message

Marc Zyngier Oct. 9, 2024, 6:59 p.m. UTC

As of the ARM ARM Known Issues document 102105_K.a_04_en, D22677
fixes a problem with the PIRE0_EL2 register, resulting in its
removal from the VNCR page (it had no purpose being there the
first place).

Follow the architecture update by removing this offset.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/vncr_mapping.h | 1 -
 1 file changed, 1 deletion(-)

diff mbox series

Patch

diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm/vncr_mapping.h
index 06f8ec0906a6e..4f9bbd4d6c267 100644
--- a/arch/arm64/include/asm/vncr_mapping.h
+++ b/arch/arm64/include/asm/vncr_mapping.h
@@ -50,7 +50,6 @@ 
 #define VNCR_VBAR_EL1           0x250
 #define VNCR_TCR2_EL1		0x270
 #define VNCR_PIRE0_EL1		0x290
-#define VNCR_PIRE0_EL2		0x298
 #define VNCR_PIR_EL1		0x2A0
 #define VNCR_POR_EL1		0x2A8
 #define VNCR_ICH_LR0_EL2        0x400