Message ID | 20241009190019.3222687-30-maz@kernel.org (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | KVM: arm64: Add EL2 support to FEAT_S1PIE/S1POE | expand |
On Wed, Oct 09, 2024 at 08:00:12PM +0100, Marc Zyngier wrote: > All the El0/EL1 S1PIE/S1POE system register are caught by the HCR_EL2 > TCM and TRVM bits. Reflect this in the coarse grained trap table. typo: TVM > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/arm64/kvm/emulate-nested.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > index ddcbaa983de36..0ab0905533545 100644 > --- a/arch/arm64/kvm/emulate-nested.c > +++ b/arch/arm64/kvm/emulate-nested.c > @@ -704,6 +704,10 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = { > SR_TRAP(SYS_MAIR_EL1, CGT_HCR_TVM_TRVM), > SR_TRAP(SYS_AMAIR_EL1, CGT_HCR_TVM_TRVM), > SR_TRAP(SYS_CONTEXTIDR_EL1, CGT_HCR_TVM_TRVM), > + SR_TRAP(SYS_PIR_EL1, CGT_HCR_TVM_TRVM), > + SR_TRAP(SYS_PIRE0_EL1, CGT_HCR_TVM_TRVM), > + SR_TRAP(SYS_POR_EL0, CGT_HCR_TVM_TRVM), > + SR_TRAP(SYS_POR_EL1, CGT_HCR_TVM_TRVM), > SR_TRAP(SYS_TCR2_EL1, CGT_HCR_TVM_TRVM_HCRX_TCR2En), > SR_TRAP(SYS_DC_ZVA, CGT_HCR_TDZ), > SR_TRAP(SYS_DC_GVA, CGT_HCR_TDZ), > -- > 2.39.2 >
diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index ddcbaa983de36..0ab0905533545 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -704,6 +704,10 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = { SR_TRAP(SYS_MAIR_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_AMAIR_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_CONTEXTIDR_EL1, CGT_HCR_TVM_TRVM), + SR_TRAP(SYS_PIR_EL1, CGT_HCR_TVM_TRVM), + SR_TRAP(SYS_PIRE0_EL1, CGT_HCR_TVM_TRVM), + SR_TRAP(SYS_POR_EL0, CGT_HCR_TVM_TRVM), + SR_TRAP(SYS_POR_EL1, CGT_HCR_TVM_TRVM), SR_TRAP(SYS_TCR2_EL1, CGT_HCR_TVM_TRVM_HCRX_TCR2En), SR_TRAP(SYS_DC_ZVA, CGT_HCR_TDZ), SR_TRAP(SYS_DC_GVA, CGT_HCR_TDZ),
All the El0/EL1 S1PIE/S1POE system register are caught by the HCR_EL2 TCM and TRVM bits. Reflect this in the coarse grained trap table. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/kvm/emulate-nested.c | 4 ++++ 1 file changed, 4 insertions(+)