@@ -3933,6 +3933,7 @@ static void kvm_accel_instance_init(Object *obj)
s->xen_evtchn_max_pirq = 256;
s->device = NULL;
s->msr_energy.enable = false;
+ s->pmu_cap_disabled = false;
}
/**
@@ -166,6 +166,7 @@ struct KVMState
uint16_t xen_gnttab_max_frames;
uint16_t xen_evtchn_max_pirq;
char *device;
+ bool pmu_cap_disabled;
};
void kvm_memory_listener_register(KVMState *s, KVMMemoryListener *kml,
@@ -191,7 +191,8 @@ DEF("accel", HAS_ARG, QEMU_OPTION_accel,
" eager-split-size=n (KVM Eager Page Split chunk size, default 0, disabled. ARM only)\n"
" notify-vmexit=run|internal-error|disable,notify-window=n (enable notify VM exit and set notify window, x86 only)\n"
" thread=single|multi (enable multi-threaded TCG)\n"
- " device=path (KVM device path, default /dev/kvm)\n", QEMU_ARCH_ALL)
+ " device=path (KVM device path, default /dev/kvm)\n"
+ " pmu-cap-disabled=true|false (disable KVM_CAP_PMU_CAPABILITY, x86 only, default false)\n", QEMU_ARCH_ALL)
SRST
``-accel name[,prop=value[,...]]``
This is used to enable an accelerator. Depending on the target
@@ -277,6 +278,12 @@ SRST
option can be used to pass the KVM device to use via a file descriptor
by setting the value to ``/dev/fdset/NN``.
+ ``pmu-cap-disabled=true|false``
+ When using the KVM accelerator, it controls the disabling of
+ KVM_CAP_PMU_CAPABILITY via KVM_PMU_CAP_DISABLE. When this capability is
+ disabled, PMU virtualization is turned off at the KVM module level.
+ Note that this functionality is supported for x86 hosts only.
+
ERST
DEF("smp", HAS_ARG, QEMU_OPTION_smp,
@@ -7102,7 +7102,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
case 0x80000022:
*eax = *ebx = *ecx = *edx = 0;
/* AMD Extended Performance Monitoring and Debug */
- if (kvm_enabled() && cpu->enable_pmu &&
+ if (kvm_enabled() && cpu->enable_pmu && !kvm_pmu_cap_disabled() &&
(env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_PERFCORE) &&
(env->features[FEAT_8000_0022_EAX] & CPUID_8000_0022_EAX_PERFMON_V2)) {
*eax |= CPUID_8000_0022_EAX_PERFMON_V2;
@@ -166,6 +166,7 @@ static bool has_msr_vmx_procbased_ctls2;
static bool has_msr_perf_capabs;
static bool has_msr_pkrs;
static bool has_msr_hwcr;
+static bool has_pmu_cap;
static uint32_t has_architectural_pmu_version;
static uint32_t num_architectural_pmu_gp_counters;
@@ -3196,6 +3197,11 @@ static void kvm_vm_enable_energy_msrs(KVMState *s)
return;
}
+bool kvm_pmu_cap_disabled(void)
+{
+ return kvm_state->pmu_cap_disabled;
+}
+
int kvm_arch_init(MachineState *ms, KVMState *s)
{
int ret;
@@ -3335,6 +3341,23 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
}
}
+ has_pmu_cap = kvm_check_extension(s, KVM_CAP_PMU_CAPABILITY);
+
+ if (s->pmu_cap_disabled) {
+ if (has_pmu_cap) {
+ ret = kvm_vm_enable_cap(s, KVM_CAP_PMU_CAPABILITY, 0,
+ KVM_PMU_CAP_DISABLE);
+ if (ret < 0) {
+ s->pmu_cap_disabled = false;
+ error_report("kvm: Failed to disable pmu cap: %s",
+ strerror(-ret));
+ }
+ } else {
+ s->pmu_cap_disabled = false;
+ error_report("kvm: KVM_CAP_PMU_CAPABILITY is not supported");
+ }
+ }
+
return 0;
}
@@ -6525,6 +6548,29 @@ static void kvm_arch_set_xen_evtchn_max_pirq(Object *obj, Visitor *v,
s->xen_evtchn_max_pirq = value;
}
+static void kvm_set_pmu_cap_disabled(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ KVMState *s = KVM_STATE(obj);
+ bool pmu_cap_disabled;
+ Error *error = NULL;
+
+ if (s->fd != -1) {
+ error_setg(errp, "Cannot set properties after the accelerator has "
+ "been initialized");
+ return;
+ }
+
+ visit_type_bool(v, name, &pmu_cap_disabled, &error);
+ if (error) {
+ error_propagate(errp, error);
+ return;
+ }
+
+ s->pmu_cap_disabled = pmu_cap_disabled;
+}
+
void kvm_arch_accel_class_init(ObjectClass *oc)
{
object_class_property_add_enum(oc, "notify-vmexit", "NotifyVMexitOption",
@@ -6564,6 +6610,12 @@ void kvm_arch_accel_class_init(ObjectClass *oc)
NULL, NULL);
object_class_property_set_description(oc, "xen-evtchn-max-pirq",
"Maximum number of Xen PIRQs");
+
+ object_class_property_add(oc, "pmu-cap-disabled", "bool",
+ NULL, kvm_set_pmu_cap_disabled,
+ NULL, NULL);
+ object_class_property_set_description(oc, "pmu-cap-disabled",
+ "Disable KVM_CAP_PMU_CAPABILITY");
}
void kvm_set_max_apic_id(uint32_t max_apic_id)
@@ -49,6 +49,8 @@ uint64_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index);
void kvm_set_max_apic_id(uint32_t max_apic_id);
void kvm_request_xsave_components(X86CPU *cpu, uint64_t mask);
+bool kvm_pmu_cap_disabled(void);
+
#ifdef CONFIG_KVM
bool kvm_is_vm_type_supported(int type);
The AMD PMU virtualization is not disabled when configuring "-cpu host,-pmu" in the QEMU command line on an AMD server. Neither "-cpu host,-pmu" nor "-cpu EPYC" effectively disables AMD PMU virtualization in such an environment. As a result, VM logs typically show: [ 0.510611] Performance Events: Fam17h+ core perfctr, AMD PMU driver. whereas the expected logs should be: [ 0.596381] Performance Events: PMU not available due to virtualization, using software events only. [ 0.600972] NMI watchdog: Perf NMI watchdog permanently disabled This discrepancy occurs because AMD PMU does not use CPUID to determine whether PMU virtualization is supported. To address this, we introduce a new property, 'pmu-cap-disabled', for KVM acceleration. This property sets KVM_PMU_CAP_DISABLE if KVM_CAP_PMU_CAPABILITY is supported. Note that this feature currently supports only x86 hosts, as KVM_CAP_PMU_CAPABILITY is used exclusively for x86 systems. Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com> --- Another previous solution to re-use '-cpu host,-pmu': https://lore.kernel.org/all/20221119122901.2469-1-dongli.zhang@oracle.com/ accel/kvm/kvm-all.c | 1 + include/sysemu/kvm_int.h | 1 + qemu-options.hx | 9 ++++++- target/i386/cpu.c | 2 +- target/i386/kvm/kvm.c | 52 ++++++++++++++++++++++++++++++++++++++ target/i386/kvm/kvm_i386.h | 2 ++ 6 files changed, 65 insertions(+), 2 deletions(-)