From patchwork Wed Nov 6 09:40:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13864233 Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 709941D2B1A for ; Wed, 6 Nov 2024 09:40:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730886033; cv=none; b=bx17GZ+I9g5eqdGxA8P+JLzkelpKnn/MIlUsKhi4/IsWNfK60lmsLRVy4mN5+16rxJi1xQdDyVwlRsKW3u/Ha7Qd3lf539I4XAckDNoE0d0hQWeFVfoSSPztE0FxowHN28YxoCQFVdk7VxTGQIcAKDwScYHn3I1kzBd7YGZP1OE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730886033; c=relaxed/simple; bh=xWzp4q/Yc610wE29WPq7MSJLwe8He07G8ngFGM4+zCw=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=e7VIR+VeJhB7m590zKNxLmO0wqz7SbnpnaWul3u4g2reEVyt/xNfA+L7jIXq11YxEsdkLB0gCCsaXARLlqVo9YHWl/XW7p9kZPPuMHTvgmH1aI5FlN2d3GpkSV+zCftVIu43aSskmIL9yEI+l/tKiZLuWb8iaEDPv45tTjW0JRw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Zp/JyKYe; arc=none smtp.client-ip=91.218.175.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Zp/JyKYe" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1730886026; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=/Nf//oMm1jXKJtNESLqpXj4iYiNyKQ+J2gfB8vo39zw=; b=Zp/JyKYeEDdz1qFLHMY1j8zdPzEkVhXiBUdn2oyGFNZ8WllVtmQILTQIgf/+mQ761a/+Le TJrPkf+0S+Z67fFRBUbSjzY7twe7ZVb7m2Y48yzluyCWzRcqZn7OT6pQHtQwVFjsYb8MJu YFHpn1MJjLh2f2QAAyFIzeKZl8XTDJw= From: Andrew Jones To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: atishp@rivosinc.com, jamestiotio@gmail.com Subject: [kvm-unit-tests PATCH] riscv: sbi: Prepare for assembly entry points Date: Wed, 6 Nov 2024 10:40:16 +0100 Message-ID: <20241106094015.21204-2-andrew.jones@linux.dev> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT From: James Raphael Tiovalen The HSM tests will need to test HSM start and resumption from HSM suspend. Prepare for these tests, as well other tests, such as the SUSP resume tests, by providing an assembly file for SBI tests. Signed-off-by: James Raphael Tiovalen Signed-off-by: Andrew Jones --- riscv/Makefile | 3 ++- riscv/sbi-asm.S | 12 ++++++++++++ riscv/sbi-tests.h | 6 ++++++ 3 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 riscv/sbi-asm.S create mode 100644 riscv/sbi-tests.h diff --git a/riscv/Makefile b/riscv/Makefile index 22fd273acac3..734441f94dad 100644 --- a/riscv/Makefile +++ b/riscv/Makefile @@ -43,6 +43,7 @@ cflatobjs += lib/riscv/timer.o ifeq ($(ARCH),riscv32) cflatobjs += lib/ldiv32.o endif +cflatobjs += riscv/sbi-asm.o ######################################## @@ -82,7 +83,7 @@ CFLAGS += -mcmodel=medany CFLAGS += -std=gnu99 CFLAGS += -ffreestanding CFLAGS += -O2 -CFLAGS += -I $(SRCDIR)/lib -I $(SRCDIR)/lib/libfdt -I lib +CFLAGS += -I $(SRCDIR)/lib -I $(SRCDIR)/lib/libfdt -I lib -I $(SRCDIR)/riscv asm-offsets = lib/riscv/asm-offsets.h include $(SRCDIR)/scripts/asm-offsets.mak diff --git a/riscv/sbi-asm.S b/riscv/sbi-asm.S new file mode 100644 index 000000000000..fbf97cab39c8 --- /dev/null +++ b/riscv/sbi-asm.S @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Helper assembly code routines for RISC-V SBI extension tests. + * + * Copyright (C) 2024, James Raphael Tiovalen + */ +#define __ASSEMBLY__ + +#include "sbi-tests.h" + +.section .text + diff --git a/riscv/sbi-tests.h b/riscv/sbi-tests.h new file mode 100644 index 000000000000..c28046f7cfbd --- /dev/null +++ b/riscv/sbi-tests.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _RISCV_SBI_TESTS_H_ +#define _RISCV_SBI_TESTS_H_ + + +#endif /* _RISCV_SBI_TESTS_H_ */