[14/15] KVM: x86: Hoist SVM MSR intercepts to common x86 code

Message ID	20241127201929.4005605-15-aaronlewis@google.com (mailing list archive)
State	New
Headers	show Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33B44202F84 for <kvm@vger.kernel.org>; Wed, 27 Nov 2024 20:20:13 +0000 (UTC) Date: Wed, 27 Nov 2024 20:19:28 +0000 In-Reply-To: <20241127201929.4005605-1-aaronlewis@google.com> Precedence: bulk Mime-Version: 1.0 References: <20241127201929.4005605-1-aaronlewis@google.com> Message-ID: <20241127201929.4005605-15-aaronlewis@google.com> Subject: [PATCH 14/15] KVM: x86: Hoist SVM MSR intercepts to common x86 code From: Aaron Lewis <aaronlewis@google.com> To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com, Aaron Lewis <aaronlewis@google.com> Content-Type: text/plain; charset="UTF-8"
Series	Unify MSR intercepts in x86 \| expand [00/15] Unify MSR intercepts in x86 [01/15] KVM: x86: Use non-atomic bit ops to manipulate "shadow" MSR intercepts [02/15] KVM: SVM: Use non-atomic bit ops to manipulate MSR interception bitmaps [03/15] KVM: SVM: Invert the polarity of the "shadow" MSR interception bitmaps [04/15] KVM: SVM: Track MSRPM as "unsigned long", not "u32" [05/15] KVM: x86: SVM: Adopt VMX style MSR intercepts in SVM [06/15] KVM: SVM: Disable intercepts for all direct access MSRs on MSR filter changes [07/15] KVM: SVM: Delete old SVM MSR management code [08/15] KVM: SVM: Pass through GHCB MSR if and only if VM is SEV-ES [09/15] KVM: SVM: Drop "always" flag from list of possible passthrough MSRs [10/15] KVM: SVM: Don't "NULL terminate" the list of possible passthrough MSRs [11/15] KVM: VMX: Make list of possible passthrough MSRs "const" [12/15] KVM: x86: Track possible passthrough MSRs in kvm_x86_ops [13/15] KVM: x86: Move ownership of passthrough MSR "shadow" to common x86 [14/15] KVM: x86: Hoist SVM MSR intercepts to common x86 code [15/15] KVM: x86: Hoist VMX MSR intercepts to common x86 code

diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h index 124c2e1e42026..3f10ce4957f74 100644 --- a/arch/x86/include/asm/kvm-x86-ops.h +++ b/arch/x86/include/asm/kvm-x86-ops.h @@ -132,6 +132,7 @@ KVM_X86_OP(apic_init_signal_blocked) KVM_X86_OP_OPTIONAL(enable_l2_tlb_flush) KVM_X86_OP_OPTIONAL(migrate_timers) KVM_X86_OP_OPTIONAL(msr_filter_changed) +KVM_X86_OP_OPTIONAL(get_msr_bitmap_entries) KVM_X86_OP(disable_intercept_for_msr) KVM_X86_OP(complete_emulated_msr) KVM_X86_OP(vcpu_deliver_sipi_vector) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 808b5365e4bd2..763fc054a2c56 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1830,6 +1830,9 @@ struct kvm_x86_ops { const u32 * const possible_passthrough_msrs; const u32 nr_possible_passthrough_msrs; + void (*get_msr_bitmap_entries)(struct kvm_vcpu *vcpu, u32 msr, + unsigned long **read_map, u8 *read_bit, + unsigned long **write_map, u8 *write_bit); void (*disable_intercept_for_msr)(struct kvm_vcpu *vcpu, u32 msr, int type); void (*msr_filter_changed)(struct kvm_vcpu *vcpu); int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 31ed6c68e8194..aaf244e233b90 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -799,84 +799,20 @@ static void svm_get_msr_bitmap_entries(struct kvm_vcpu *vcpu, u32 msr, *write_map = &svm->msrpm[offset]; } -#define BUILD_SVM_MSR_BITMAP_HELPER(fn, bitop, access) \ -static inline void fn(struct kvm_vcpu *vcpu, u32 msr) \ -{ \ - unsigned long *read_map, *write_map; \ - u8 read_bit, write_bit; \ - \ - svm_get_msr_bitmap_entries(vcpu, msr, &read_map, &read_bit, \ - &write_map, &write_bit); \ - bitop(access##_bit, access##_map); \ -} - -BUILD_SVM_MSR_BITMAP_HELPER(svm_set_msr_bitmap_read, __set_bit, read) -BUILD_SVM_MSR_BITMAP_HELPER(svm_set_msr_bitmap_write, __set_bit, write) -BUILD_SVM_MSR_BITMAP_HELPER(svm_clear_msr_bitmap_read, __clear_bit, read) -BUILD_SVM_MSR_BITMAP_HELPER(svm_clear_msr_bitmap_write, __clear_bit, write) - void svm_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) { - struct vcpu_svm *svm = to_svm(vcpu); - int slot; - - slot = kvm_passthrough_msr_slot(msr); - WARN_ON(slot == -ENOENT); - if (slot >= 0) { - /* Set the shadow bitmaps to the desired intercept states */ - if (type & MSR_TYPE_R) - __clear_bit(slot, vcpu->arch.shadow_msr_intercept.read); - if (type & MSR_TYPE_W) - __clear_bit(slot, vcpu->arch.shadow_msr_intercept.write); - } - - /* - * Don't disabled interception for the MSR if userspace wants to - * handle it. - */ - if ((type & MSR_TYPE_R) && !kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_READ)) { - svm_set_msr_bitmap_read(vcpu, msr); - type &= ~MSR_TYPE_R; - } - - if ((type & MSR_TYPE_W) && !kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_WRITE)) { - svm_set_msr_bitmap_write(vcpu, msr); - type &= ~MSR_TYPE_W; - } - - if (type & MSR_TYPE_R) - svm_clear_msr_bitmap_read(vcpu, msr); - - if (type & MSR_TYPE_W) - svm_clear_msr_bitmap_write(vcpu, msr); + kvm_disable_intercept_for_msr(vcpu, msr, type); svm_hv_vmcb_dirty_nested_enlightenments(vcpu); - svm->nested.force_msr_bitmap_recalc = true; + to_svm(vcpu)->nested.force_msr_bitmap_recalc = true; } void svm_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) { - struct vcpu_svm *svm = to_svm(vcpu); - int slot; - - slot = kvm_passthrough_msr_slot(msr); - WARN_ON(slot == -ENOENT); - if (slot >= 0) { - /* Set the shadow bitmaps to the desired intercept states */ - if (type & MSR_TYPE_R) - __set_bit(slot, vcpu->arch.shadow_msr_intercept.read); - if (type & MSR_TYPE_W) - __set_bit(slot, vcpu->arch.shadow_msr_intercept.write); - } - - if (type & MSR_TYPE_R) - svm_set_msr_bitmap_read(vcpu, msr); - - if (type & MSR_TYPE_W) - svm_set_msr_bitmap_write(vcpu, msr); + kvm_enable_intercept_for_msr(vcpu, msr, type); svm_hv_vmcb_dirty_nested_enlightenments(vcpu); - svm->nested.force_msr_bitmap_recalc = true; + to_svm(vcpu)->nested.force_msr_bitmap_recalc = true; } unsigned long *svm_vcpu_alloc_msrpm(void) @@ -5127,6 +5063,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .possible_passthrough_msrs = direct_access_msrs, .nr_possible_passthrough_msrs = ARRAY_SIZE(direct_access_msrs), + .get_msr_bitmap_entries = svm_get_msr_bitmap_entries, .disable_intercept_for_msr = svm_disable_intercept_for_msr, .complete_emulated_msr = svm_complete_emulated_msr, diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 2082ae8dc5db1..1e607a0eb58a0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1819,6 +1819,81 @@ int kvm_passthrough_msr_slot(u32 msr) } EXPORT_SYMBOL_GPL(kvm_passthrough_msr_slot); +#define BUILD_KVM_MSR_BITMAP_HELPER(fn, bitop, access) \ +static inline void fn(struct kvm_vcpu *vcpu, u32 msr) \ +{ \ + unsigned long *read_map, *write_map; \ + u8 read_bit, write_bit; \ + \ + static_call(kvm_x86_get_msr_bitmap_entries)(vcpu, msr, \ + &read_map, &read_bit, \ + &write_map, &write_bit); \ + bitop(access##_bit, access##_map); \ +} + +BUILD_KVM_MSR_BITMAP_HELPER(kvm_set_msr_bitmap_read, __set_bit, read) +BUILD_KVM_MSR_BITMAP_HELPER(kvm_set_msr_bitmap_write, __set_bit, write) +BUILD_KVM_MSR_BITMAP_HELPER(kvm_clear_msr_bitmap_read, __clear_bit, read) +BUILD_KVM_MSR_BITMAP_HELPER(kvm_clear_msr_bitmap_write, __clear_bit, write) + +void kvm_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) +{ + int slot; + + slot = kvm_passthrough_msr_slot(msr); + WARN_ON(slot == -ENOENT); + if (slot >= 0) { + /* Set the shadow bitmaps to the desired intercept states */ + if (type & MSR_TYPE_R) + __clear_bit(slot, vcpu->arch.shadow_msr_intercept.read); + if (type & MSR_TYPE_W) + __clear_bit(slot, vcpu->arch.shadow_msr_intercept.write); + } + + /* + * Don't disabled interception for the MSR if userspace wants to + * handle it. + */ + if ((type & MSR_TYPE_R) && !kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_READ)) { + kvm_set_msr_bitmap_read(vcpu, msr); + type &= ~MSR_TYPE_R; + } + + if ((type & MSR_TYPE_W) && !kvm_msr_allowed(vcpu, msr, KVM_MSR_FILTER_WRITE)) { + kvm_set_msr_bitmap_write(vcpu, msr); + type &= ~MSR_TYPE_W; + } + + if (type & MSR_TYPE_R) + kvm_clear_msr_bitmap_read(vcpu, msr); + + if (type & MSR_TYPE_W) + kvm_clear_msr_bitmap_write(vcpu, msr); +} +EXPORT_SYMBOL_GPL(kvm_disable_intercept_for_msr); + +void kvm_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type) +{ + int slot; + + slot = kvm_passthrough_msr_slot(msr); + WARN_ON(slot == -ENOENT); + if (slot >= 0) { + /* Set the shadow bitmaps to the desired intercept states */ + if (type & MSR_TYPE_R) + __set_bit(slot, vcpu->arch.shadow_msr_intercept.read); + if (type & MSR_TYPE_W) + __set_bit(slot, vcpu->arch.shadow_msr_intercept.write); + } + + if (type & MSR_TYPE_R) + kvm_set_msr_bitmap_read(vcpu, msr); + + if (type & MSR_TYPE_W) + kvm_set_msr_bitmap_write(vcpu, msr); +} +EXPORT_SYMBOL_GPL(kvm_enable_intercept_for_msr); + static void kvm_msr_filter_changed(struct kvm_vcpu *vcpu) { u32 msr, i; diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 208f0698c64e2..239cc4de49c58 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -556,6 +556,8 @@ int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva); bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); int kvm_passthrough_msr_slot(u32 msr); +void kvm_enable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type); +void kvm_disable_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type); enum kvm_msr_access { MSR_TYPE_R = BIT(0),

[14/15] KVM: x86: Hoist SVM MSR intercepts to common x86 code

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