Message ID | 20241203090045.942078-9-nikunj@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add Secure TSC support for SNP guests | expand |
On Tue, Dec 03, 2024 at 02:30:40PM +0530, Nikunj A Dadhania wrote: > When Secure TSC is enabled and TscInvariant (bit 8) in CPUID_8000_0007_edx > is set, the kernel complains with the below firmware bug: > > [Firmware Bug]: TSC doesn't count with P0 frequency! This happens in a normal guest too: [ 0.000000] [Firmware Bug]: TSC doesn't count with P0 frequency! [ 0.000000] BIOS-provided physical RAM map: [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ffff] usable ... [ 0.000000] DMI: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 2023.11-8 02/21/2024 ... If anything, this should check X86_FEATURE_HYPERVISOR but this is just a silly warning so you don't really need to do anything about it.
On 12/17/2024 4:40 PM, Borislav Petkov wrote: > On Tue, Dec 03, 2024 at 02:30:40PM +0530, Nikunj A Dadhania wrote: >> When Secure TSC is enabled and TscInvariant (bit 8) in CPUID_8000_0007_edx >> is set, the kernel complains with the below firmware bug: >> >> [Firmware Bug]: TSC doesn't count with P0 frequency! > > This happens in a normal guest too: > > [ 0.000000] [Firmware Bug]: TSC doesn't count with P0 frequency! > [ 0.000000] BIOS-provided physical RAM map: > [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ffff] usable > ... > [ 0.000000] DMI: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 2023.11-8 02/21/2024 > ... > > If anything, this should check X86_FEATURE_HYPERVISOR but this is just a silly > warning so you don't really need to do anything about it. In that case, let me drop this patch. Regards, Nikunj
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index d8408aafeed9..af9dd545f0ec 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -370,7 +370,8 @@ static void bsp_determine_snp(struct cpuinfo_x86 *c) static void bsp_init_amd(struct cpuinfo_x86 *c) { - if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { + if (cpu_has(c, X86_FEATURE_CONSTANT_TSC) && + !cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) { if (c->x86 > 0x10 || (c->x86 == 0x10 && c->x86_model >= 0x2)) {