| Message ID | 20241203184158.172492-3-ramesh.thomas@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Extend 8-byte PCI load/store support to x86 arch | expand |
On Tue, Dec 03, 2024 at 10:41:58AM -0800, Ramesh Thomas wrote: > Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to > 64 bit IO access. Since default implementations have been enabled, the > checks are not required. Such checks can hide potential bugs as well. > Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64 > bit support is enabled. Why? The whole point of the emulation header to to avoid this? I think you would just include the header and then remove the ifdef entirely. Instead of vfio doing memcpy with 32 bit it will do memcpy internally to the io accessors? There is nothing about this that has to be atomic or something. Jason
On 12/9/2024 10:19 AM, Jason Gunthorpe wrote: > On Tue, Dec 03, 2024 at 10:41:58AM -0800, Ramesh Thomas wrote: >> Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to >> 64 bit IO access. Since default implementations have been enabled, the >> checks are not required. Such checks can hide potential bugs as well. >> Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64 >> bit support is enabled. > Why? > > The whole point of the emulation header to to avoid this? > > I think you would just include the header and then remove the ifdef > entirely. Instead of vfio doing memcpy with 32 bit it will do memcpy > internally to the io accessors? > > There is nothing about this that has to be atomic or something. Ok, I will send a new patch series that only removes the check for ioread64 and iowrite64. Thanks, Ramesh
diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index a0595c745732..02a3f1cb8f77 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -62,7 +62,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_iowrite##size); VFIO_IOWRITE(8) VFIO_IOWRITE(16) VFIO_IOWRITE(32) -#ifdef iowrite64 +#ifdef CONFIG_64BIT VFIO_IOWRITE(64) #endif @@ -90,7 +90,7 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size); VFIO_IOREAD(8) VFIO_IOREAD(16) VFIO_IOREAD(32) -#ifdef ioread64 +#ifdef CONFIG_64BIT VFIO_IOREAD(64) #endif @@ -128,7 +128,7 @@ static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\ VFIO_IORDWR(8) VFIO_IORDWR(16) VFIO_IORDWR(32) -#if defined(ioread64) && defined(iowrite64) +#ifdef CONFIG_64BIT VFIO_IORDWR(64) #endif @@ -156,7 +156,7 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, else fillable = 0; -#if defined(ioread64) && defined(iowrite64) +#ifdef CONFIG_64BIT if (fillable >= 8 && !(off % 8)) { ret = vfio_pci_iordwr64(vdev, iswrite, test_mem, io, buf, off, &filled); @@ -382,7 +382,7 @@ static void vfio_pci_ioeventfd_do_write(struct vfio_pci_ioeventfd *ioeventfd, vfio_pci_core_iowrite32(ioeventfd->vdev, test_mem, ioeventfd->data, ioeventfd->addr); break; -#ifdef iowrite64 +#ifdef CONFIG_64BIT case 8: vfio_pci_core_iowrite64(ioeventfd->vdev, test_mem, ioeventfd->data, ioeventfd->addr); @@ -441,7 +441,7 @@ int vfio_pci_ioeventfd(struct vfio_pci_core_device *vdev, loff_t offset, pos >= vdev->msix_offset + vdev->msix_size)) return -EINVAL; -#ifndef iowrite64 +#ifndef CONFIG_64BIT if (count == 8) return -EINVAL; #endif
Remove the #ifdef iowrite64 and #ifdef ioread64 checks around calls to 64 bit IO access. Since default implementations have been enabled, the checks are not required. Such checks can hide potential bugs as well. Instead check for CONFIG_64BIT to make the 64 bit IO calls only when 64 bit support is enabled. Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com> --- drivers/vfio/pci/vfio_pci_rdwr.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)