From patchwork Mon Dec 9 01:07:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Binbin Wu X-Patchwork-Id: 13898739 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F6E7176FB4; Mon, 9 Dec 2024 01:06:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733706382; cv=none; b=tCxHZwrDIopZdM+hP8rH1eBDSHfGjFup60E1r5yCt38j4W/hePuYdm8kSOKwYEtCj0XXT10AfxCflGPQ6l4quOhmBO+0q0Jj2zg0q16tOfy2ftUoSz+oGPF5Ro7K92f5HN2OKuBCbGOyoSJOz9pzDEoNKUkZhiB6lwjDA6PNQyk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733706382; c=relaxed/simple; bh=3pcKpjVEt9ibyA0nZuzX0yigWtdtU16NxwvmEib/S3o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CZhjLlTXxCe0i6Ri7e86e7OZ8yzSuuxg1xv3oPX974w4GhY5Rubs/9tea71GTMG0CKEtSFAR087jw+FDNq4vTv8qQaDiD1em/3Vi4BJJmCBDLJ7r6c1D/yEVgpwZjtoRcTtB2ODPkHbP/IiQ0YFBveom6PScNYXtejnO4zVXUOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ayVi+6se; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ayVi+6se" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1733706381; x=1765242381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3pcKpjVEt9ibyA0nZuzX0yigWtdtU16NxwvmEib/S3o=; b=ayVi+6seYnOm9gf/J/FUR7Sdbz/f9ZKca6wLzsM33xN30uf66f00vHS7 ygjaMSD9asHREOAWpsOnH6eX+GOSdIOy/kI+OfPOzPwFmwusOw21Demy2 U+7knVTbUiP6p2WeZmO+xXeHDFutd13m5ESPPGT/bazy4SBYZ6r4j5dDj VafqNKfvYU1IuEtB4bl7MJJextyPY6ihA82U5MvDYugJK8kExeMTkg7HA nKbCeNI/r0Q13usAjhP56OiZxFiHCGCTQvD/OgAgCDRg4dHQeVOjH3At5 CCEMt8TmoU90IjlQEUtxQjS0qaQK9aHgF2LkeWOaH98tNtZZjK7iA/D6a Q==; X-CSE-ConnectionGUID: Y19+qIwiTzW89QSpdHcwAg== X-CSE-MsgGUID: /37aEVB3QIu4SlR7MKiezw== X-IronPort-AV: E=McAfee;i="6700,10204,11280"; a="36833732" X-IronPort-AV: E=Sophos;i="6.12,218,1728975600"; d="scan'208";a="36833732" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2024 17:06:21 -0800 X-CSE-ConnectionGUID: qA8pZ9SURaW1oZqe/zi9NQ== X-CSE-MsgGUID: NZUvgB+4TvGs+YvznYw9TQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,218,1728975600"; d="scan'208";a="95402525" Received: from litbin-desktop.sh.intel.com ([10.239.156.93]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2024 17:06:17 -0800 From: Binbin Wu To: pbonzini@redhat.com, seanjc@google.com, kvm@vger.kernel.org Cc: rick.p.edgecombe@intel.com, kai.huang@intel.com, adrian.hunter@intel.com, reinette.chatre@intel.com, xiaoyao.li@intel.com, tony.lindgren@linux.intel.com, isaku.yamahata@intel.com, yan.y.zhao@intel.com, chao.gao@intel.com, linux-kernel@vger.kernel.org, binbin.wu@linux.intel.com Subject: [PATCH 13/16] KVM: TDX: Add methods to ignore virtual apic related operation Date: Mon, 9 Dec 2024 09:07:27 +0800 Message-ID: <20241209010734.3543481-14-binbin.wu@linux.intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241209010734.3543481-1-binbin.wu@linux.intel.com> References: <20241209010734.3543481-1-binbin.wu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata TDX protects TDX guest APIC state from VMM. Implement access methods of TDX guest vAPIC state to ignore them or return zero. Signed-off-by: Isaku Yamahata Signed-off-by: Binbin Wu --- TDX interrupts breakout: - Removed WARN_ON_ONCE() in tdx_set_virtual_apic_mode(). (Rick) - Open code tdx_set_virtual_apic_mode(). (Binbin) --- arch/x86/kvm/vmx/main.c | 51 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index 13a0ab0a520c..6dcc9ebf6d6e 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -228,6 +228,15 @@ static bool vt_apic_init_signal_blocked(struct kvm_vcpu *vcpu) return vmx_apic_init_signal_blocked(vcpu); } +static void vt_set_virtual_apic_mode(struct kvm_vcpu *vcpu) +{ + /* Only x2APIC mode is supported for TD. */ + if (is_td_vcpu(vcpu)) + return; + + return vmx_set_virtual_apic_mode(vcpu); +} + static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu) { struct pi_desc *pi = vcpu_to_pi_desc(vcpu); @@ -236,6 +245,22 @@ static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu) memset(pi->pir, 0, sizeof(pi->pir)); } +static void vt_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr) +{ + if (is_td_vcpu(vcpu)) + return; + + return vmx_hwapic_irr_update(vcpu, max_irr); +} + +static void vt_hwapic_isr_update(int max_isr) +{ + if (is_td_vcpu(kvm_get_running_vcpu())) + return; + + return vmx_hwapic_isr_update(max_isr); +} + static int vt_sync_pir_to_irr(struct kvm_vcpu *vcpu) { if (is_td_vcpu(vcpu)) @@ -414,6 +439,22 @@ static void vt_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason, vmx_get_exit_info(vcpu, reason, info1, info2, intr_info, error_code); } +static void vt_set_apic_access_page_addr(struct kvm_vcpu *vcpu) +{ + if (is_td_vcpu(vcpu)) + return; + + vmx_set_apic_access_page_addr(vcpu); +} + +static void vt_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) +{ + if (WARN_ON_ONCE(is_td_vcpu(vcpu))) + return; + + vmx_refresh_apicv_exec_ctrl(vcpu); +} + static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp) { if (!is_td(kvm)) @@ -527,14 +568,14 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .update_cr8_intercept = vmx_update_cr8_intercept, .x2apic_icr_is_split = false, - .set_virtual_apic_mode = vmx_set_virtual_apic_mode, - .set_apic_access_page_addr = vmx_set_apic_access_page_addr, - .refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl, + .set_virtual_apic_mode = vt_set_virtual_apic_mode, + .set_apic_access_page_addr = vt_set_apic_access_page_addr, + .refresh_apicv_exec_ctrl = vt_refresh_apicv_exec_ctrl, .load_eoi_exitmap = vmx_load_eoi_exitmap, .apicv_pre_state_restore = vt_apicv_pre_state_restore, .required_apicv_inhibits = VMX_REQUIRED_APICV_INHIBITS, - .hwapic_irr_update = vmx_hwapic_irr_update, - .hwapic_isr_update = vmx_hwapic_isr_update, + .hwapic_irr_update = vt_hwapic_irr_update, + .hwapic_isr_update = vt_hwapic_isr_update, .sync_pir_to_irr = vt_sync_pir_to_irr, .deliver_interrupt = vt_deliver_interrupt, .dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,