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Wed, 05 Feb 2025 23:23:31 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fa09a72292sm630883a91.27.2025.02.05.23.23.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Feb 2025 23:23:31 -0800 (PST) From: Atish Patra Date: Wed, 05 Feb 2025 23:23:15 -0800 Subject: [PATCH v4 10/21] dt-bindings: riscv: add Counter delegation ISA extensions description Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250205-counter_delegation-v4-10-835cfa88e3b1@rivosinc.com> References: <20250205-counter_delegation-v4-0-835cfa88e3b1@rivosinc.com> In-Reply-To: <20250205-counter_delegation-v4-0-835cfa88e3b1@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anup Patel , Atish Patra , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , weilin.wang@intel.com Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 Add description for the Smcdeleg/Ssccfg extension. Signed-off-by: Atish Patra --- .../devicetree/bindings/riscv/extensions.yaml | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index be9ebe927a64..b20dc75457d2 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -128,6 +128,13 @@ properties: changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: smcdeleg + description: | + The standard Smcdeleg supervisor-level extension for the machine mode + to delegate the hpmcounters to supvervisor mode so that they are + directlyi accessible in the supervisor mode as ratified in the + 20240213 version of the privileged ISA specification. + - const: smcsrind description: | The standard Smcsrind supervisor-level extension extends the @@ -175,6 +182,14 @@ properties: behavioural changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: ssccfg + description: | + The standard Ssccfg supervisor-level extension for configuring + the delegated hpmcounters to be accessible directly in supervisor + mode as ratified in the 20240213 version of the privileged ISA + specification. This extension depends on Sscsrind, Smcdeleg, Zihpm, + Zicntr extensions. + - const: sscofpmf description: | The standard Sscofpmf supervisor-level extension for count overflow @@ -685,6 +700,36 @@ properties: then: contains: const: zca + # Smcdeleg depends on Sscsrind, Zihpm, Zicntr + - If: + contains: + const: smcdeleg + then: + allOf: + - contains: + const: sscsrind + - contains: + const: zihpm + - contains: + const: zicntr + # Ssccfg depends on Smcdeleg, Sscsrind, Zihpm, Zicntr, Sscofpmf, Smcntrpmf + - If: + contains: + const: ssccfg + then: + allOf: + - contains: + const: smcdeleg + - contains: + const: sscsrind + - contains: + const: sscofpmf + - contains: + const: smcntrpmf + - contains: + const: zihpm + - contains: + const: zicntr allOf: # Zcf extension does not exist on rv64