From patchwork Fri Apr 4 19:38:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 14038851 Received: from mail-pf1-f202.google.com (mail-pf1-f202.google.com [209.85.210.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8445A22C34A for ; Fri, 4 Apr 2025 19:40:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743795640; cv=none; b=KtD0m8cff8UWwV9dVq/rN6+tCtiXeMGXErEKGKYBJg4uDCZzK3QwAUbU3bT5e4/9zQtAx+EJKxzTqVEEmuCT/z+33yQhIi7GRnrB3MNMervjatZjq1z0COib4iAuCn5AQcivH9je+gZgG1ZWYBQ8kBvLlwqTSqZbwYo6rjHuQ8g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743795640; c=relaxed/simple; bh=cdKlTVqFAw8ApvEuQ7prWTD3bUNet1piEa49vQ1EufI=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=AZAMtB5QBnSoq5Z5U0dFjcRDaTbFf8ONsSp0LEKiqoDvRAzkHWwaeJ7ev2k8SV3mjAGKcODjD4A07HxPwMI33HTG+66KRysxS2LpReU7SqeIvvLtkbhLwPz4RxTpfdptTW6YFePlbxdP/kE06UY5QxvCCPqhzc//ikC8BWAa3WE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=z0GBCpx4; arc=none smtp.client-ip=209.85.210.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="z0GBCpx4" Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-7377139d8b1so1924390b3a.0 for ; Fri, 04 Apr 2025 12:40:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1743795637; x=1744400437; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=1QbRZKRmRkfriBxkLy7PYXuhu9Zt47DLy3JPC1CCZP0=; b=z0GBCpx4MaMZxljY9dGLNUf9NudFLzm9lH+toFsTmtQ7SdWNK/MFLPcYEUeiSCM1cz Vu+ABra7HvAVD3NlSpPrF5Zn8o2GhHWEDm/QJZ/sTZErj7Yl9jlRvMhP3I9jJd/3ypmi btK/6EAI2prH8/isNVw1jRkR8lb7+rRqWWjFG0+feUbXlzWJIwsDaxB5XCYT1BB7zeaq emAV4V+H36oA7GBXn1G5L3KYfjqguB9x59V/9VL54qxT2vzYmu+WL4BkQi81v26Eapvr PPxk/Wh5X13jeedIASTYiMLripuS9JA2hCub5aHX4o8ZjjCtjmiPanRJ7cQcKIUAwd7r 97yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743795637; x=1744400437; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=1QbRZKRmRkfriBxkLy7PYXuhu9Zt47DLy3JPC1CCZP0=; b=erGlVUsxnsAw0mdfWxxWn4tkRRgGb0Iib9+h6VFS7IiE+M4pxZy2nMjrpFEaAH9Wtq yI9aWv2fwd034xZ2/Bx0yNcwxdPg7w9NfmS+tm6kR4awV4ffVxtYUD3hjgmOuzbGgNDS JOtDyyf5G8lP0jZlI6QWDD4wz7kh9xGu7fZEU1H3Aw9x1KqmOmGlo0kjcOWPk5auITa1 XTE1psCPbCjaTKqVd8IXgDYquoDJCY5cs+LbRLHkzVMeXAU42AWeesgRN6OhtI7/F6Qs 27WtpSpYvtKV9mQdB8HN1yOXsVz2tFY2i95hAnN7vwDpOcO+OeoXZDWbHXnWU5Ca+aEc qKOQ== X-Gm-Message-State: AOJu0Yz/wCClpsf1DWm1PabOogoujftnVJi4JQ+hLYewMFpVLEr5cS2m I12JnHb+KYoWW4ZsN39fwtke/eCgknp3skMBl2X57IGpWi9vWOUA+qxFafN8cu6p7tW3geDYb7Y tXQ== X-Google-Smtp-Source: AGHT+IF7hVw0fjyQPYLVoXo+ylFst6APnbo8/gAtHy3E1LET5Ypzmt4DGEcGNQw0IysuKrRghF3jHnzmiw0= X-Received: from pfbic5.prod.google.com ([2002:a05:6a00:8a05:b0:736:3a40:5df5]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:240d:b0:736:4d44:8b77 with SMTP id d2e1a72fcca58-739e6fdea83mr6214670b3a.8.1743795637056; Fri, 04 Apr 2025 12:40:37 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 4 Apr 2025 12:38:44 -0700 In-Reply-To: <20250404193923.1413163-1-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250404193923.1413163-1-seanjc@google.com> X-Mailer: git-send-email 2.49.0.504.g3bcea36a83-goog Message-ID: <20250404193923.1413163-30-seanjc@google.com> Subject: [PATCH 29/67] KVM: SVM: Stop walking list of routing table entries when updating IRTE From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Joerg Roedel , David Woodhouse , Lu Baolu Cc: kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Maxim Levitsky , Joao Martins , David Matlack Now that KVM SVM simply uses the provided routing entry, stop walking the routing table to find that entry. KVM, via setup_routing_entry() and sanity checked by kvm_get_msi_route(), disallows having a GSI configured to trigger multiple MSIs. Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 106 ++++++++++++++++------------------------ 1 file changed, 43 insertions(+), 63 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index eb6017b01c5f..685a7b01194b 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -852,10 +852,10 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, unsigned int host_irq, uint32_t guest_irq, struct kvm_kernel_irq_routing_entry *new) { - struct kvm_kernel_irq_routing_entry *e; - struct kvm_irq_routing_table *irq_rt; bool enable_remapped_mode = true; - int idx, ret = 0; + struct vcpu_data vcpu_info; + struct vcpu_svm *svm = NULL; + int ret = 0; if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass()) return 0; @@ -869,70 +869,51 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n", __func__, host_irq, guest_irq, !!new); - idx = srcu_read_lock(&kvm->irq_srcu); - irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu); + /** + * Here, we setup with legacy mode in the following cases: + * 1. When cannot target interrupt to a specific vcpu. + * 2. Unsetting posted interrupt. + * 3. APIC virtualization is disabled for the vcpu. + * 4. IRQ has incompatible delivery mode (SMI, INIT, etc) + */ + if (new && new->type == KVM_IRQ_ROUTING_MSI && + !get_pi_vcpu_info(kvm, new, &vcpu_info, &svm) && + kvm_vcpu_apicv_active(&svm->vcpu)) { + struct amd_iommu_pi_data pi; - if (guest_irq >= irq_rt->nr_rt_entries || - hlist_empty(&irq_rt->map[guest_irq])) { - pr_warn_once("no route for guest_irq %u/%u (broken user space?)\n", - guest_irq, irq_rt->nr_rt_entries); - goto out; - } + enable_remapped_mode = false; - hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) { - struct vcpu_data vcpu_info; - struct vcpu_svm *svm = NULL; - - if (e->type != KVM_IRQ_ROUTING_MSI) - continue; - - WARN_ON_ONCE(new && memcmp(e, new, sizeof(*new))); + /* + * Try to enable guest_mode in IRTE. Note, the address + * of the vCPU's AVIC backing page is passed to the + * IOMMU via vcpu_info->pi_desc_addr. + */ + pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, + svm->vcpu.vcpu_id); + pi.is_guest_mode = true; + pi.vcpu_data = &vcpu_info; + ret = irq_set_vcpu_affinity(host_irq, &pi); /** - * Here, we setup with legacy mode in the following cases: - * 1. When cannot target interrupt to a specific vcpu. - * 2. Unsetting posted interrupt. - * 3. APIC virtualization is disabled for the vcpu. - * 4. IRQ has incompatible delivery mode (SMI, INIT, etc) + * Here, we successfully setting up vcpu affinity in + * IOMMU guest mode. Now, we need to store the posted + * interrupt information in a per-vcpu ir_list so that + * we can reference to them directly when we update vcpu + * scheduling information in IOMMU irte. */ - if (new && !get_pi_vcpu_info(kvm, new, &vcpu_info, &svm) && - kvm_vcpu_apicv_active(&svm->vcpu)) { - struct amd_iommu_pi_data pi; - - enable_remapped_mode = false; - - /* - * Try to enable guest_mode in IRTE. Note, the address - * of the vCPU's AVIC backing page is passed to the - * IOMMU via vcpu_info->pi_desc_addr. - */ - pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, - svm->vcpu.vcpu_id); - pi.is_guest_mode = true; - pi.vcpu_data = &vcpu_info; - ret = irq_set_vcpu_affinity(host_irq, &pi); - - /** - * Here, we successfully setting up vcpu affinity in - * IOMMU guest mode. Now, we need to store the posted - * interrupt information in a per-vcpu ir_list so that - * we can reference to them directly when we update vcpu - * scheduling information in IOMMU irte. - */ - if (!ret && pi.is_guest_mode) - svm_ir_list_add(svm, irqfd, &pi); - } - - if (!ret && svm) { - trace_kvm_pi_irte_update(host_irq, svm->vcpu.vcpu_id, - e->gsi, vcpu_info.vector, - vcpu_info.pi_desc_addr, !!new); - } - - if (ret < 0) { - pr_err("%s: failed to update PI IRTE\n", __func__); - goto out; - } + if (!ret) + ret = svm_ir_list_add(svm, irqfd, &pi); + } + + if (!ret && svm) { + trace_kvm_pi_irte_update(host_irq, svm->vcpu.vcpu_id, + guest_irq, vcpu_info.vector, + vcpu_info.pi_desc_addr, !!new); + } + + if (ret < 0) { + pr_err("%s: failed to update PI IRTE\n", __func__); + goto out; } if (enable_remapped_mode) @@ -940,7 +921,6 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm, else ret = 0; out: - srcu_read_unlock(&kvm->irq_srcu, idx); return ret; }