diff mbox series

[v7,6/6] hisi_acc_vfio_pci: update function return values.

Message ID 20250411035907.57488-7-liulongfang@huawei.com (mailing list archive)
State New
Headers show
Series bugfix some driver issues | expand

Commit Message

Longfang Liu April 11, 2025, 3:59 a.m. UTC
In this driver file, many functions call sub-functions and use ret
to store the error code of the sub-functions.
However, instead of directly returning ret to the caller, they use a
converted error code, which prevents the end-user from clearly
understanding the root cause of the error.
Therefore, the code needs to be modified to directly return the error
code from the sub-functions.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
---
 drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Shameerali Kolothum Thodi April 15, 2025, 9:25 a.m. UTC | #1
> -----Original Message-----
> From: liulongfang <liulongfang@huawei.com>
> Sent: Friday, April 11, 2025 4:59 AM
> To: alex.williamson@redhat.com; jgg@nvidia.com; Shameerali Kolothum
> Thodi <shameerali.kolothum.thodi@huawei.com>; Jonathan Cameron
> <jonathan.cameron@huawei.com>
> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org;
> linuxarm@openeuler.org; liulongfang <liulongfang@huawei.com>
> Subject: [PATCH v7 6/6] hisi_acc_vfio_pci: update function return values.
> 
> In this driver file, many functions call sub-functions and use ret
> to store the error code of the sub-functions.
> However, instead of directly returning ret to the caller, they use a
> converted error code, which prevents the end-user from clearly
> understanding the root cause of the error.
> Therefore, the code needs to be modified to directly return the error
> code from the sub-functions.
> 
> Signed-off-by: Longfang Liu <liulongfang@huawei.com>
> ---
>  drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
> b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
> index d12a350440d3..c63e302ac092 100644
> --- a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
> +++ b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
> @@ -392,7 +392,7 @@ static int vf_qm_check_match(struct
> hisi_acc_vf_core_device *hisi_acc_vdev,
>  	ret = vf_qm_version_check(vf_data, dev);
>  	if (ret) {
>  		dev_err(dev, "failed to match ACC_DEV_MAGIC\n");
> -		return -EINVAL;
> +		return ret;
>  	}
> 
>  	if (vf_data->dev_id != hisi_acc_vdev->vf_dev->device) {
> @@ -404,7 +404,7 @@ static int vf_qm_check_match(struct
> hisi_acc_vf_core_device *hisi_acc_vdev,
>  	ret = qm_get_vft(vf_qm, &vf_qm->qp_base);
>  	if (ret <= 0) {
>  		dev_err(dev, "failed to get vft qp nums\n");
> -		return -EINVAL;
> +		return ret;
>  	}
> 
>  	if (ret != vf_data->qp_num) {
> @@ -501,7 +501,7 @@ static int vf_qm_load_data(struct
> hisi_acc_vf_core_device *hisi_acc_vdev,
>  	ret = qm_write_regs(qm, QM_VF_STATE, &vf_data->vf_qm_state, 1);
>  	if (ret) {
>  		dev_err(dev, "failed to write QM_VF_STATE\n");
> -		return -EINVAL;
> +		return ret;
>  	}
>  	hisi_acc_vdev->vf_qm_state = vf_data->vf_qm_state;
> 
> @@ -542,7 +542,7 @@ static int vf_qm_read_data(struct hisi_qm *vf_qm,
> struct acc_vf_data *vf_data)
> 
>  	ret = qm_get_regs(vf_qm, vf_data);
>  	if (ret)
> -		return -EINVAL;
> +		return ret;
> 
>  	/* Every reg is 32 bit, the dma address is 64 bit. */
>  	vf_data->eqe_dma = vf_data->qm_eqc_dw[QM_XQC_ADDR_HIGH];
> @@ -556,13 +556,13 @@ static int vf_qm_read_data(struct hisi_qm
> *vf_qm, struct acc_vf_data *vf_data)
>  	ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);
>  	if (ret) {
>  		dev_err(dev, "failed to read SQC addr!\n");
> -		return -EINVAL;
> +		return ret;
>  	}
> 
>  	ret = qm_get_cqc(vf_qm, &vf_data->cqc_dma);
>  	if (ret) {
>  		dev_err(dev, "failed to read CQC addr!\n");
> -		return -EINVAL;
> +		return ret;
>  	}
> 
>  	return 0;
> @@ -588,7 +588,7 @@ static int vf_qm_state_save(struct
> hisi_acc_vf_core_device *hisi_acc_vdev,
> 
>  	ret = vf_qm_read_data(vf_qm, vf_data);
>  	if (ret)
> -		return -EINVAL;
> +		return ret;
> 
>  	migf->total_length = sizeof(struct acc_vf_data);
>  	/* Save eqc and aeqc interrupt information */
> @@ -1379,7 +1379,7 @@ static int hisi_acc_vf_debug_check(struct seq_file
> *seq, struct vfio_device *vde
>  	ret = qm_wait_dev_not_ready(vf_qm);
>  	if (ret) {
>  		seq_puts(seq, "VF device not ready!\n");
> -		return -EBUSY;
> +		return ret;
>  	}
> 
>  	return 0;

Any reason you avoided few other instances here?

1. qemu_set_regs() --> hisi_qm_wait_mb_ready() -->ret -EBUSY;
2. vf_qm_cache_wb() ret -EINVAL on -ETIMEOUT.

With the above addressed,

Reviewed-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>

Thanks,
Shameer
diff mbox series

Patch

diff --git a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
index d12a350440d3..c63e302ac092 100644
--- a/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
+++ b/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
@@ -392,7 +392,7 @@  static int vf_qm_check_match(struct hisi_acc_vf_core_device *hisi_acc_vdev,
 	ret = vf_qm_version_check(vf_data, dev);
 	if (ret) {
 		dev_err(dev, "failed to match ACC_DEV_MAGIC\n");
-		return -EINVAL;
+		return ret;
 	}
 
 	if (vf_data->dev_id != hisi_acc_vdev->vf_dev->device) {
@@ -404,7 +404,7 @@  static int vf_qm_check_match(struct hisi_acc_vf_core_device *hisi_acc_vdev,
 	ret = qm_get_vft(vf_qm, &vf_qm->qp_base);
 	if (ret <= 0) {
 		dev_err(dev, "failed to get vft qp nums\n");
-		return -EINVAL;
+		return ret;
 	}
 
 	if (ret != vf_data->qp_num) {
@@ -501,7 +501,7 @@  static int vf_qm_load_data(struct hisi_acc_vf_core_device *hisi_acc_vdev,
 	ret = qm_write_regs(qm, QM_VF_STATE, &vf_data->vf_qm_state, 1);
 	if (ret) {
 		dev_err(dev, "failed to write QM_VF_STATE\n");
-		return -EINVAL;
+		return ret;
 	}
 	hisi_acc_vdev->vf_qm_state = vf_data->vf_qm_state;
 
@@ -542,7 +542,7 @@  static int vf_qm_read_data(struct hisi_qm *vf_qm, struct acc_vf_data *vf_data)
 
 	ret = qm_get_regs(vf_qm, vf_data);
 	if (ret)
-		return -EINVAL;
+		return ret;
 
 	/* Every reg is 32 bit, the dma address is 64 bit. */
 	vf_data->eqe_dma = vf_data->qm_eqc_dw[QM_XQC_ADDR_HIGH];
@@ -556,13 +556,13 @@  static int vf_qm_read_data(struct hisi_qm *vf_qm, struct acc_vf_data *vf_data)
 	ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);
 	if (ret) {
 		dev_err(dev, "failed to read SQC addr!\n");
-		return -EINVAL;
+		return ret;
 	}
 
 	ret = qm_get_cqc(vf_qm, &vf_data->cqc_dma);
 	if (ret) {
 		dev_err(dev, "failed to read CQC addr!\n");
-		return -EINVAL;
+		return ret;
 	}
 
 	return 0;
@@ -588,7 +588,7 @@  static int vf_qm_state_save(struct hisi_acc_vf_core_device *hisi_acc_vdev,
 
 	ret = vf_qm_read_data(vf_qm, vf_data);
 	if (ret)
-		return -EINVAL;
+		return ret;
 
 	migf->total_length = sizeof(struct acc_vf_data);
 	/* Save eqc and aeqc interrupt information */
@@ -1379,7 +1379,7 @@  static int hisi_acc_vf_debug_check(struct seq_file *seq, struct vfio_device *vde
 	ret = qm_wait_dev_not_ready(vf_qm);
 	if (ret) {
 		seq_puts(seq, "VF device not ready!\n");
-		return -EBUSY;
+		return ret;
 	}
 
 	return 0;