From patchwork Mon Jan 22 23:53:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13526490 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F944629EA; Mon, 22 Jan 2024 23:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.120 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967749; cv=none; b=EVedUnPxmNWqXh5g3OOLUjXa7P6zwevHUZqfRvSBAVBl6vNEwvD2AwcL3Bwc6W+5pI4OMj7AmDdJATJPfQblKaWt5Gf8OHYuLOpetSnnETf0xV290Jx4Hk4h8sG8NnfZmpe/nQ0PgQHeaD52zxVu2WkfwsT+2L+mNu3sKdrufHY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705967749; c=relaxed/simple; bh=gQVNk1VC6MELbKm1sZDA/40FCQQXc4e9eG9BSyRWIz4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=l97fcb23nCUcw1WarObwRkUbHPPmZ5XzWHBGE890gH1SIxkWbaT4Cs/tAR5SF/lfbp656CEB23KN0FHQFlLkJnxV418UkY1l5aY3H5/N498vEts8NLlBbe9PmEdZ3Puq4s9TmmoIr/EXpF7EqrFkC+FCFqvGLx774ztj3xKZZek= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BROQoC5Y; arc=none smtp.client-ip=192.55.52.120 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BROQoC5Y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705967747; x=1737503747; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gQVNk1VC6MELbKm1sZDA/40FCQQXc4e9eG9BSyRWIz4=; b=BROQoC5YHDXLWNBnnSRpp6q59e5lmtgzp8XU9lzJdKZmCct8ct6XRSKq ep9qZiuyuQpB3LsbP0efGQgsmUag23uqXXg+gXt+UODeTcuShuH+czycN 36o+o/uQd8W6h8c41KVrFMyhj4nPYRnYSNCQSlAXNBeMhzx1GDIDopldh BM5Y1SN8ZdZP9NRsTmb/MSTaXwugHKaUZ7MEzlfRwTMuVaD7zq/L2DBon vgG7wEN7BU0Z4vDTJmsScfrvHO5chCCbRPfjyDxa9dgg58pY5hinToErx huE1T09V57uobdYA0l+LtzrCWt8BV7OMG62/nFZl6DDsUlVEjSwKiW+Vm g==; X-IronPort-AV: E=McAfee;i="6600,9927,10961"; a="400217779" X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="400217779" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,212,1701158400"; d="scan'208";a="27817916" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 15:55:43 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , Kai Huang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v18 079/121] KVM: x86: Assume timer IRQ was injected if APIC state is proteced Date: Mon, 22 Jan 2024 15:53:55 -0800 Message-Id: <40afbaeeadeb06562769e0532fceff8a56483873.1705965635.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Sean Christopherson If APIC state is protected, i.e. the vCPU is a TDX guest, assume a timer IRQ was injected when deciding whether or not to busy wait in the "timer advanced" path. The "real" vIRR is not readable/writable, so trying to query for a pending timer IRQ will return garbage. Note, TDX can scour the PIR if it wants to be more precise and skip the "wait" call entirely. Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index e8034f2f2dd1..8025c7f614e0 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1774,8 +1774,17 @@ static void apic_update_lvtt(struct kvm_lapic *apic) static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT); + u32 reg; + /* + * Assume a timer IRQ was "injected" if the APIC is protected. KVM's + * copy of the vIRR is bogus, it's the responsibility of the caller to + * precisely check whether or not a timer IRQ is pending. + */ + if (apic->guest_apic_protected) + return true; + + reg = kvm_lapic_get_reg(apic, APIC_LVTT); if (kvm_apic_hw_enabled(apic)) { int vec = reg & APIC_VECTOR_MASK; void *bitmap = apic->regs + APIC_ISR;