From patchwork Thu Sep 17 16:38:49 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 48296 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8HGd83f026085 for ; Thu, 17 Sep 2009 16:39:08 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758501AbZIQQjA (ORCPT ); Thu, 17 Sep 2009 12:39:00 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758537AbZIQQjA (ORCPT ); Thu, 17 Sep 2009 12:39:00 -0400 Received: from thoth.sbs.de ([192.35.17.2]:23661 "EHLO thoth.sbs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754305AbZIQQjA (ORCPT ); Thu, 17 Sep 2009 12:39:00 -0400 Received: from mail2.siemens.de (localhost [127.0.0.1]) by thoth.sbs.de (8.12.11.20060308/8.12.11) with ESMTP id n8HGcnqb014478; Thu, 17 Sep 2009 18:38:49 +0200 Received: from [139.25.109.167] (mchn012c.ww002.siemens.net [139.25.109.167] (may be forged)) by mail2.siemens.de (8.12.11.20060308/8.12.11) with ESMTP id n8HGcn7o022095; Thu, 17 Sep 2009 18:38:49 +0200 Message-ID: <4AB26619.3080805@siemens.com> Date: Thu, 17 Sep 2009 18:38:49 +0200 From: Jan Kiszka User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 MIME-Version: 1.0 To: Avi Kivity , Marcelo Tosatti CC: kvm-devel Subject: [PATCH] gdbstub: x86: Switch 64/32 bit registers dynamically Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Commit 56aebc891674cd2d07b3f64183415697be200084 changed gdbstub in way that debugging 32 or 16-bit guest code is no longer possible with qemu for x86_64 guest CPUs. Since that commit, qemu only provides registers sets for 64-bit, forcing current and foreseeable gdb to also switch its architecture to 64-bit. And this breaks if the inferior is 32 or 16 bit. No question, this is a gdb issue. But, as it was confirmed in several discusssions with gdb people, it is a non-trivial thing to fix. So until qemu finds a gdb version attach with a rework x86 support, we have to work around it by switching the register layout as the guest switches its execution mode between 16/32 and 64 bit. Signed-off-by: Jan Kiszka --- Sent to qemu-kvm for inclusion on Avi's request as this workaround is still disliked upstream. Note: qemu-kvm's gdbstub support in kvm mode is currently borken in git - I'm bisecting... gdbstub.c | 55 ++++++++++++++++++++++++++++++++++++++++------------- target-i386/cpu.h | 7 +++++-- 2 files changed, 47 insertions(+), 15 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/gdbstub.c b/gdbstub.c index c9304cd..a33aba0 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -506,8 +506,9 @@ static const int gpr_map[16] = { 8, 9, 10, 11, 12, 13, 14, 15 }; #else -static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7}; +#define gpr_map gpr_map32 #endif +static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25) @@ -521,7 +522,11 @@ static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7}; static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) { if (n < CPU_NB_REGS) { - GET_REGL(env->regs[gpr_map[n]]); + if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { + GET_REG64(env->regs[gpr_map[n]]); + } else if (n < CPU_NB_REGS32) { + GET_REG32(env->regs[gpr_map32[n]]); + } } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { #ifdef USE_X86LDOUBLE /* FIXME: byteswap float values - after fixing fpregs layout. */ @@ -532,12 +537,20 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) return 10; } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { n -= IDX_XMM_REGS; - stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0)); - stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1)); - return 16; + if (n < CPU_NB_REGS32 || + (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) { + stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0)); + stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1)); + return 16; + } } else { switch (n) { - case IDX_IP_REG: GET_REGL(env->eip); + case IDX_IP_REG: + if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { + GET_REG64(env->eip); + } else { + GET_REG32(env->eip); + } case IDX_FLAGS_REG: GET_REG32(env->eflags); case IDX_SEG_REGS: GET_REG32(env->segs[R_CS].selector); @@ -593,8 +606,15 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) uint32_t tmp; if (n < CPU_NB_REGS) { - env->regs[gpr_map[n]] = ldtul_p(mem_buf); - return sizeof(target_ulong); + if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { + env->regs[gpr_map[n]] = ldtul_p(mem_buf); + return sizeof(target_ulong); + } else if (n < CPU_NB_REGS32) { + n = gpr_map32[n]; + env->regs[n] &= ~0xffffffffUL; + env->regs[n] |= (uint32_t)ldl_p(mem_buf); + return 4; + } } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { #ifdef USE_X86LDOUBLE /* FIXME: byteswap float values - after fixing fpregs layout. */ @@ -603,14 +623,23 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return 10; } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { n -= IDX_XMM_REGS; - env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf); - env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8); - return 16; + if (n < CPU_NB_REGS32 || + (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) { + env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf); + env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8); + return 16; + } } else { switch (n) { case IDX_IP_REG: - env->eip = ldtul_p(mem_buf); - return sizeof(target_ulong); + if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { + env->eip = ldq_p(mem_buf); + return 8; + } else { + env->eip &= ~0xffffffffUL; + env->eip |= (uint32_t)ldl_p(mem_buf); + return 4; + } case IDX_FLAGS_REG: env->eflags = ldl_p(mem_buf); return 4; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index b9a6392..4506d73 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -555,10 +555,13 @@ typedef union { #endif #define MMX_Q(n) q +#define CPU_NB_REGS64 16 +#define CPU_NB_REGS32 8 + #ifdef TARGET_X86_64 -#define CPU_NB_REGS 16 +#define CPU_NB_REGS CPU_NB_REGS64 #else -#define CPU_NB_REGS 8 +#define CPU_NB_REGS CPU_NB_REGS32 #endif #define NB_MMU_MODES 2