From patchwork Mon Feb 18 09:17:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 2156641 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 67CD9DF25A for ; Mon, 18 Feb 2013 09:17:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757180Ab3BRJRV (ORCPT ); Mon, 18 Feb 2013 04:17:21 -0500 Received: from mout.web.de ([212.227.15.3]:55535 "EHLO mout.web.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756980Ab3BRJRT (ORCPT ); Mon, 18 Feb 2013 04:17:19 -0500 Received: from mchn199C.mchp.siemens.de ([95.157.56.37]) by smtp.web.de (mrweb103) with ESMTPSA (Nemesis) id 0MGA7n-1U4IRv3Djr-00EvBz; Mon, 18 Feb 2013 10:17:17 +0100 Message-ID: <5121F19A.5030506@web.de> Date: Mon, 18 Feb 2013 10:17:14 +0100 From: Jan Kiszka User-Agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666 MIME-Version: 1.0 To: Gleb Natapov , Marcelo Tosatti CC: Nadav Har'El , kvm , Orit Wasserman Subject: [PATCH v5] KVM: nVMX: Improve I/O exit handling References: <51180635.3060003@web.de> <20130211100721.GA11107@fermat.math.technion.ac.il> <5118C4F9.707@web.de> <5118D3B5.5010406@siemens.com> <20130214093257.GK9817@redhat.com> <511D30FF.10108@siemens.com> <5121CB15.10206@web.de> <20130218084446.GX9817@redhat.com> <5121EC02.30704@web.de> <20130218085701.GA13680@redhat.com> In-Reply-To: <20130218085701.GA13680@redhat.com> X-Enigmail-Version: 1.5 X-Provags-ID: V02:K0:ZLQo9WVD1lwd3y/1QHEo0Afry11r4spWN0agCJLdPem 4g3ltHnPTEVDYRxZ3M2PWwDL0TnsuoZFXUMM64wZNXEn+INPCW dkaf7p2jvQZAfAtO1AO83jZ5jjFdMTDkd7iVdcXxpaNS/HdkxB YWhf3l/mxcNbcYXIdyfiLz2E3VBn3v4ITDRpxRlhAcNs2D1bS/ pI3Kt633TZ6zWaV5H+OxA== Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jan Kiszka This prevents trapping L2 I/O exits if L1 has neither unconditional nor bitmap-based exiting enabled. Furthermore, it implements I/O bitmap handling. We still exit unconditionally in case the CPU does not provide information for ins/outs. Signed-off-by: Jan Kiszka --- Changes in v5: - still exit unconditionally if CPU refuses to provide exit information on ins/outs arch/x86/kvm/vmx.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 56 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6667042..ccc7c17 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -651,6 +651,7 @@ static struct vmcs_config { int size; int order; u32 revision_id; + u32 vmx_basic_high; u32 pin_based_exec_ctrl; u32 cpu_based_exec_ctrl; u32 cpu_based_2nd_exec_ctrl; @@ -752,6 +753,11 @@ static inline bool vm_need_tpr_shadow(struct kvm *kvm) return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)); } +static inline bool cpu_has_stringio_exit_info(void) +{ + return vmcs_config.vmx_basic_high & (VMX_BASIC_INOUT >> 32); +} + static inline bool cpu_has_secondary_exec_ctrls(void) { return vmcs_config.cpu_based_exec_ctrl & @@ -2635,6 +2641,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) vmcs_conf->size = vmx_msr_high & 0x1fff; vmcs_conf->order = get_order(vmcs_config.size); vmcs_conf->revision_id = vmx_msr_low; + vmcs_conf->vmx_basic_high = vmx_msr_high; vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control; vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control; @@ -5908,6 +5915,54 @@ static int (*const kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = { static const int kvm_vmx_max_exit_handlers = ARRAY_SIZE(kvm_vmx_exit_handlers); +static bool nested_vmx_exit_handled_io(struct kvm_vcpu *vcpu, + struct vmcs12 *vmcs12) +{ + unsigned long exit_qualification; + gpa_t bitmap, last_bitmap; + u16 port; + int size; + u8 b; + + if (nested_cpu_has(vmcs12, CPU_BASED_UNCOND_IO_EXITING)) + return 1; + + if (!nested_cpu_has(vmcs12, CPU_BASED_USE_IO_BITMAPS)) + return 0; + + /* TODO: for older CPUs, derive access width from instruction */ + if (!cpu_has_stringio_exit_info()) + return 1; + + exit_qualification = vmcs_readl(EXIT_QUALIFICATION); + + port = exit_qualification >> 16; + size = (exit_qualification & 7) + 1; + + last_bitmap = (gpa_t)-1; + b = -1; + + while (size > 0) { + if (port < 0x8000) + bitmap = vmcs12->io_bitmap_a; + else + bitmap = vmcs12->io_bitmap_b; + bitmap += (port & 0x7fff) / 8; + + if (last_bitmap != bitmap) + if (kvm_read_guest(vcpu->kvm, bitmap, &b, 1)) + return 1; + if (b & (1 << (port & 7))) + return 1; + + port++; + size--; + last_bitmap = bitmap; + } + + return 0; +} + /* * Return 1 if we should exit from L2 to L1 to handle an MSR access access, * rather than handle it ourselves in L0. I.e., check whether L1 expressed @@ -6097,8 +6152,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu) case EXIT_REASON_DR_ACCESS: return nested_cpu_has(vmcs12, CPU_BASED_MOV_DR_EXITING); case EXIT_REASON_IO_INSTRUCTION: - /* TODO: support IO bitmaps */ - return 1; + return nested_vmx_exit_handled_io(vcpu, vmcs12); case EXIT_REASON_MSR_READ: case EXIT_REASON_MSR_WRITE: return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);