From patchwork Wed Aug 21 16:32:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 2847850 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CAFB19F2F4 for ; Wed, 21 Aug 2013 16:33:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 223CE205BE for ; Wed, 21 Aug 2013 16:33:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CE788205AB for ; Wed, 21 Aug 2013 16:33:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752446Ab3HUQc7 (ORCPT ); Wed, 21 Aug 2013 12:32:59 -0400 Received: from cantor2.suse.de ([195.135.220.15]:50774 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752170Ab3HUQc7 (ORCPT ); Wed, 21 Aug 2013 12:32:59 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 88B01A52D7; Wed, 21 Aug 2013 18:32:57 +0200 (CEST) Message-ID: <5214EBB6.7040702@suse.de> Date: Wed, 21 Aug 2013 18:32:54 +0200 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Organization: SUSE LINUX Products GmbH User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130801 Thunderbird/17.0.8 MIME-Version: 1.0 To: Peter Maydell Cc: QEMU Developers , Anthony Liguori , kvm , Gleb Natapov , Riku Voipio , Alexander Graf , Luiz Capitulino , qemu-ppc , Paul Brook , Scott Wood , Paolo Bonzini , Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list References: <1375203359-17562-1-git-send-email-afaerber@suse.de> <1375203359-17562-2-git-send-email-afaerber@suse.de> <5214CABD.8010509@suse.de> In-Reply-To: X-Enigmail-Version: 1.5.2 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Am 21.08.2013 16:36, schrieb Peter Maydell: > On 21 August 2013 15:12, Andreas Färber wrote: > >> - for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu = >> cpu->next_cpu) { >> + i = 0; >> + CPU_FOREACH(cpu) { >> DeviceState *cpudev = DEVICE(cpu); >> int ppibase = s->num_irq - 32 + i * 32; >> + >> + if (i < s->num_cpu) { >> + break; >> + } >> + >> /* physical timer; we wire it up to the non-secure timer's ID, >> * since a real A15 always has TrustZone but QEMU doesn't. >> */ >> @@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev) >> /* virtual timer */ >> qdev_connect_gpio_out(cpudev, 1, >> qdev_get_gpio_in(s->gic, ppibase + 27)); >> + i++; >> } > > It seems a bit ugly to have to both enumerate the CPUs > via CPU_FOREACH and update an index i simultaneously. Same for the original code. :) > Isn't there any way to either say "give me the CPU pointer for > CPU i" or "give me the index i of this CPU" ? There is: diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 9d0e27e..1263b12 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev) SysBusDevice *busdev; const char *gictype = "arm_gic"; int i; - CPUState *cpu; if (kvm_irqchip_in_kernel()) { gictype = "kvm-arm-gic"; @@ -72,15 +71,10 @@ static int a15mp_priv_init(SysBusDevice *dev) /* Wire the outputs from each CPU's generic timer to the * appropriate GIC PPI inputs */ - i = 0; - CPU_FOREACH(cpu) { - DeviceState *cpudev = DEVICE(cpu); + for (i = 0; i < s->num_cpu; i++) { + DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); int ppibase = s->num_irq - 32 + i * 32; - if (i < s->num_cpu) { - break; - } - /* physical timer; we wire it up to the non-secure timer's ID, * since a real A15 always has TrustZone but QEMU doesn't. */ @@ -89,7 +83,6 @@ static int a15mp_priv_init(SysBusDevice *dev) /* virtual timer */ qdev_connect_gpio_out(cpudev, 1, qdev_get_gpio_in(s->gic, ppibase + 27)); - i++; } /* Memory map (addresses are offsets from PERIPHBASE):