From patchwork Thu Jul 8 00:54:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 12364265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11FE3C11F6A for ; Thu, 8 Jul 2021 00:56:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F3E6A61CD4 for ; Thu, 8 Jul 2021 00:56:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230376AbhGHA6q (ORCPT ); Wed, 7 Jul 2021 20:58:46 -0400 Received: from mga18.intel.com ([134.134.136.126]:19318 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230209AbhGHA6h (ORCPT ); Wed, 7 Jul 2021 20:58:37 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10038"; a="196696081" X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="196696081" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2021 17:55:56 -0700 X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="423770050" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2021 17:55:56 -0700 From: isaku.yamahata@gmail.com To: qemu-devel@nongnu.org, pbonzini@redhat.com, alistair@alistair23.me, ehabkost@redhat.com, marcel.apfelbaum@gmail.com, mst@redhat.com, cohuck@redhat.com, mtosatti@redhat.com, xiaoyao.li@intel.com, seanjc@google.com, erdemaktas@google.com Cc: kvm@vger.kernel.org, isaku.yamahata@gmail.com, isaku.yamahata@intel.com Subject: [RFC PATCH v2 19/44] hw/i386/e820: introduce a helper function to change type of e820 Date: Wed, 7 Jul 2021 17:54:49 -0700 Message-Id: <57f1c8c44405aadc421bc1fd5b6cb41f55b10e20.1625704981.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Isaku Yamahata Introduce a helper function, e820_change_type(), that change the type of subregion of e820 entry. The following patch uses it. Signed-off-by: Isaku Yamahata --- hw/i386/e820_memory_layout.c | 72 ++++++++++++++++++++++++++++++++++++ hw/i386/e820_memory_layout.h | 1 + 2 files changed, 73 insertions(+) diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c index d9bb11c02a..109c4f715a 100644 --- a/hw/i386/e820_memory_layout.c +++ b/hw/i386/e820_memory_layout.c @@ -57,6 +57,78 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) return e820_entries; } +int e820_change_type(uint64_t address, uint64_t length, uint32_t type) +{ + size_t i; + + if (type != E820_RAM) { + int ret = e820_append_reserve(address, length, type); + if (ret) { + return ret; + } + } + + /* new "etc/e820" file -- include ram too */ + for (i = 0; i < e820_entries; i++) { + struct e820_entry *e = &e820_table[i]; + struct e820_entry tmp = { + .address = le64_to_cpu(e->address), + .length = le64_to_cpu(e->length), + .type = le32_to_cpu(e->type), + }; + /* overlap? */ + if (address + length < tmp.address || + tmp.address + tmp.length < address) { + continue; + } + /* + * partial-overlap is not allowed. + * It is assumed that the region is completely contained within + * other region. + */ + if (address < tmp.address || + tmp.address + tmp.length < address + length) { + return -EINVAL; + } + /* only real type change is allowed. */ + if (tmp.type == type) { + return -EINVAL; + } + + if (tmp.address == address && + tmp.address + tmp.length == address + length) { + e->type = cpu_to_le32(type); + return e820_entries; + } else if (tmp.address == address) { + e820_table = g_renew(struct e820_entry, + e820_table, e820_entries + 1); + e = &e820_table[i]; + e->address = cpu_to_le64(tmp.address + length); + e820_append_entry(address, length, type); + return e820_entries; + } else if (tmp.address + tmp.length == address + length) { + e820_table = g_renew(struct e820_entry, + e820_table, e820_entries + 1); + e = &e820_table[i]; + e->length = cpu_to_le64(tmp.length - length); + e820_append_entry(address, length, type); + return e820_entries; + } else { + e820_table = g_renew(struct e820_entry, + e820_table, e820_entries + 2); + e = &e820_table[i]; + e->length = cpu_to_le64(address - tmp.address); + e820_append_entry(address, length, type); + e820_append_entry(address + length, + tmp.address + tmp.length - (address + length), + tmp.type); + return e820_entries; + } + } + + return -EINVAL; +} + int e820_get_num_entries(void) { return e820_entries; diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h index 2a0ceb8b9c..5f27cee476 100644 --- a/hw/i386/e820_memory_layout.h +++ b/hw/i386/e820_memory_layout.h @@ -33,6 +33,7 @@ extern struct e820_table e820_reserve; extern struct e820_entry *e820_table; int e820_add_entry(uint64_t address, uint64_t length, uint32_t type); +int e820_change_type(uint64_t address, uint64_t length, uint32_t type); int e820_get_num_entries(void); bool e820_get_entry(int index, uint32_t type, uint64_t *address, uint64_t *length);