| Message ID | 62b61eb968f867518aedd98a0753b7fd29958efb.1625186503.git.isaku.yamahata@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: X86: TDX support | expand |
On 03/07/21 00:04, isaku.yamahata@intel.com wrote: > From: Isaku Yamahata <isaku.yamahata@intel.com> > > This is preparation for TDX support. > > Because SEAMCALL instruction requires VMX enabled, it needs to initialize > struct vmcs and load it before SEAMCALL instruction.[1] [2] Move out the > definition of vmcs into a common x86 header, arch/x86/include/asm/vmx.h, so > that seamloader code can share the same definition. > > [1] Intel Trust Domain CPU Architectural Extensions > https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf > > [2] TDX Module spec > https://software.intel.com/content/dam/develop/external/us/en/documents/tdx-module-1eas-v0.85.039.pdf > > Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> > --- > arch/x86/include/asm/vmx.h | 11 +++++++++++ > arch/x86/kvm/vmx/vmcs.h | 11 ----------- > 2 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > index 0ffaa3156a4e..035dfdafa2c1 100644 > --- a/arch/x86/include/asm/vmx.h > +++ b/arch/x86/include/asm/vmx.h > @@ -17,6 +17,17 @@ > #include <uapi/asm/vmx.h> > #include <asm/vmxfeatures.h> > > +struct vmcs_hdr { > + u32 revision_id:31; > + u32 shadow_vmcs:1; > +}; > + > +struct vmcs { > + struct vmcs_hdr hdr; > + u32 abort; > + char data[]; > +}; > + > #define VMCS_CONTROL_BIT(x) BIT(VMX_FEATURE_##x & 0x1f) > > /* > diff --git a/arch/x86/kvm/vmx/vmcs.h b/arch/x86/kvm/vmx/vmcs.h > index 1472c6c376f7..ac09bc4996a5 100644 > --- a/arch/x86/kvm/vmx/vmcs.h > +++ b/arch/x86/kvm/vmx/vmcs.h > @@ -11,17 +11,6 @@ > > #include "capabilities.h" > > -struct vmcs_hdr { > - u32 revision_id:31; > - u32 shadow_vmcs:1; > -}; > - > -struct vmcs { > - struct vmcs_hdr hdr; > - u32 abort; > - char data[]; > -}; > - > DECLARE_PER_CPU(struct vmcs *, current_vmcs); > > /* > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
On Fri, Jul 02, 2021, isaku.yamahata@intel.com wrote: > From: Isaku Yamahata <isaku.yamahata@intel.com> > > This is preparation for TDX support. > > Because SEAMCALL instruction requires VMX enabled, it needs to initialize > struct vmcs and load it before SEAMCALL instruction.[1] [2] Move out the > definition of vmcs into a common x86 header, arch/x86/include/asm/vmx.h, so > that seamloader code can share the same definition. ^^^^^^^^^^ SEAMLDR? I don't have a strong preference on what we call it, but we should be consistent in our usage. Same comments as the first two patches, without seeing the actual SEAMLDR code it's impossible review this patch. I certainly have no objection to splitting up this behemoth, but the series should be self contained (within reason).
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 0ffaa3156a4e..035dfdafa2c1 100644 --- a/arch/x86/include/asm/vmx.h +++ b/arch/x86/include/asm/vmx.h @@ -17,6 +17,17 @@ #include <uapi/asm/vmx.h> #include <asm/vmxfeatures.h> +struct vmcs_hdr { + u32 revision_id:31; + u32 shadow_vmcs:1; +}; + +struct vmcs { + struct vmcs_hdr hdr; + u32 abort; + char data[]; +}; + #define VMCS_CONTROL_BIT(x) BIT(VMX_FEATURE_##x & 0x1f) /* diff --git a/arch/x86/kvm/vmx/vmcs.h b/arch/x86/kvm/vmx/vmcs.h index 1472c6c376f7..ac09bc4996a5 100644 --- a/arch/x86/kvm/vmx/vmcs.h +++ b/arch/x86/kvm/vmx/vmcs.h @@ -11,17 +11,6 @@ #include "capabilities.h" -struct vmcs_hdr { - u32 revision_id:31; - u32 shadow_vmcs:1; -}; - -struct vmcs { - struct vmcs_hdr hdr; - u32 abort; - char data[]; -}; - DECLARE_PER_CPU(struct vmcs *, current_vmcs); /*