From patchwork Fri Mar 1 17:28:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 13578849 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71CB211C88; Fri, 1 Mar 2024 17:29:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709314188; cv=none; b=AhUp6G/Ofonb9TyvaiBokzIPJV9daW2EZ+G5TNMlzuZuWLxRj9jlhYAQAQUivTWWyZcvT/DN0qKHgG03H1uf++Jx3jWgOM6AO/WPUaDgIBPDgobkFLQQo8i1oGuRsYvLMbtYN443Fsph2E5r4Wh/et5qTPzZstt3ptKSX7e3ucs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709314188; c=relaxed/simple; bh=7zgHhzoa1cUt+d95umTjGfJYGkjrgy8xI3Zn8UQJKIo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=X/8DAndSmyjDrg2NovLqnT2Pfc4JiwitCAN+aRoShgZzoczX0MhCVijj0+p6Rvfjug/kvYki0EAWRqpBclrhp2jXmUeeATeY4TG7eZuwl0lemziDKlbN1YSr3gDShuQZ59/Zqf3746gS+S2oE/89z6crYab3KevB0kRFxdPa/Rw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QWyc+v2g; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QWyc+v2g" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709314186; x=1740850186; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7zgHhzoa1cUt+d95umTjGfJYGkjrgy8xI3Zn8UQJKIo=; b=QWyc+v2gQcKo2NE42H/ottxHRk9cVzUTvuDaqvOvezlkPh6/G0FPUpa3 Wyynh51KYKA+lu0sv95BQTOY2LtQM77wCL6wJ5rvshKaxZcCXFIRjXknB Ne+t6Dvxa7E0+yePTBqw1B/KSItfLcbb0RT/96VOobTWVkc12xIKLAWrW rxQH6eB6lKwsyDVDxWHeLsWheHJSr3hwc/9hU5Spb0PI5S0IRxS/2egYN n6cL4wYGfOJjOV64io4HJ5LIKhqtnKG0gp2adZyMjBvLPOIziRfTOxfnf 4eqIodnflWQmoLgbadJyDMHD6BsREQQyehCnkvP2bFMHcfcw0GzL9rE/n Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11000"; a="6812421" X-IronPort-AV: E=Sophos;i="6.06,196,1705392000"; d="scan'208";a="6812421" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2024 09:29:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,196,1705392000"; d="scan'208";a="12946563" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Mar 2024 09:29:26 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, linux-kernel@vger.kernel.org, Sean Christopherson , Paolo Bonzini , Michael Roth , David Matlack , Federico Parola Subject: [RFC PATCH 5/8] KVM: x86/mmu: Introduce kvm_mmu_map_page() for prepopulating guest memory Date: Fri, 1 Mar 2024 09:28:47 -0800 Message-Id: <7b7dd4d56249028aa0b84d439ffdf1b79e67322a.1709288671.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Isaku Yamahata Introduce a helper function to call kvm fault handler. This allows a new ioctl to invoke kvm fault handler to populate without seeing RET_PF_* enums or other KVM MMU internal definitions. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/mmu.h | 3 +++ arch/x86/kvm/mmu/mmu.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index 60f21bb4c27b..48870c5e08ec 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -183,6 +183,9 @@ static inline void kvm_mmu_refresh_passthrough_bits(struct kvm_vcpu *vcpu, __kvm_mmu_refresh_passthrough_bits(vcpu, mmu); } +int kvm_mmu_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, + u8 max_level, u8 *goal_level); + /* * Check if a given access (described through the I/D, W/R and U/S bits of a * page fault error code pfec) causes a permission fault with the given PTE diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c index e4cc7f764980..7d5e80d17977 100644 --- a/arch/x86/kvm/mmu/mmu.c +++ b/arch/x86/kvm/mmu/mmu.c @@ -4659,6 +4659,36 @@ int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) return direct_page_fault(vcpu, fault); } +int kvm_mmu_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u32 error_code, + u8 max_level, u8 *goal_level) +{ + struct kvm_page_fault fault = KVM_PAGE_FAULT_INIT(vcpu, gpa, error_code, + false, max_level); + int r; + + r = __kvm_mmu_do_page_fault(vcpu, &fault); + + if (is_error_noslot_pfn(fault.pfn) || vcpu->kvm->vm_bugged) + return -EFAULT; + + switch (r) { + case RET_PF_RETRY: + return -EAGAIN; + + case RET_PF_FIXED: + case RET_PF_SPURIOUS: + *goal_level = fault.goal_level; + return 0; + + case RET_PF_CONTINUE: + case RET_PF_EMULATE: + case RET_PF_INVALID: + default: + return -EIO; + } +} +EXPORT_SYMBOL_GPL(kvm_mmu_map_page); + static void nonpaging_init_context(struct kvm_mmu *context) { context->page_fault = nonpaging_page_fault;