| Message ID | 82D7661F83C1A047AF7DC287873BF1E167EFC0C8@SHSMSX101.ccr.corp.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 19/03/2018 08:17, Kang, Luwei wrote: >>> +u32 pt_cap_get_ex(u32 *caps, enum pt_capabilities cap) { >>> + struct pt_cap_desc *cd = &pt_caps[cap]; >>> + u32 c = caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; >>> + unsigned int shift = __ffs(cd->mask); >>> + >>> + return (c & cd->mask) >> shift; >>> +} >>> +EXPORT_SYMBOL_GPL(pt_cap_get_ex); >>> + >> >> You should change pt_cap_get to use this function. Also, "_ex" is not a very common suffix, so perhaps you can call it >> __pt_cap_get. >> >> I don't have any other comments on patches 1-3, so when you resend we can ask the x86 maintainers for approval. >> > > Hi Paolo, > Is that like this? Yes, thanks. Paolo > --- a/arch/x86/events/intel/pt.c > +++ b/arch/x86/events/intel/pt.c > @@ -76,14 +76,20 @@ > PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000), > }; > > -u32 pt_cap_get(enum pt_capabilities cap) > +u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap) > { > struct pt_cap_desc *cd = &pt_caps[cap]; > - u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; > + u32 c = caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; > unsigned int shift = __ffs(cd->mask); > > return (c & cd->mask) >> shift; > } > +EXPORT_SYMBOL_GPL(__pt_cap_get); > + > +u32 pt_cap_get(enum pt_capabilities cap) > +{ > + return __pt_cap_get(pt_pmu.caps, cap); > +} > EXPORT_SYMBOL_GPL(pt_cap_get); > > static ssize_t pt_cap_show(struct device *cdev, > diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h > index 2de4db0..3a4f524 100644 > --- a/arch/x86/include/asm/intel_pt.h > +++ b/arch/x86/include/asm/intel_pt.h > @@ -27,9 +27,11 @@ enum pt_capabilities { > #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) > void cpu_emergency_stop_pt(void); > extern u32 pt_cap_get(enum pt_capabilities cap); > +extern u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap); > #else > static inline void cpu_emergency_stop_pt(void) {} > static inline u32 pt_cap_get(enum pt_capabilities cap) { return 0; } > +static u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap) { return 0; } > > > Thanks, > Luwei Kang >
--- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -76,14 +76,20 @@ PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000), }; -u32 pt_cap_get(enum pt_capabilities cap) +u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap) { struct pt_cap_desc *cd = &pt_caps[cap]; - u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; + u32 c = caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg]; unsigned int shift = __ffs(cd->mask); return (c & cd->mask) >> shift; } +EXPORT_SYMBOL_GPL(__pt_cap_get); + +u32 pt_cap_get(enum pt_capabilities cap) +{ + return __pt_cap_get(pt_pmu.caps, cap); +} EXPORT_SYMBOL_GPL(pt_cap_get); static ssize_t pt_cap_show(struct device *cdev, diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h index 2de4db0..3a4f524 100644 --- a/arch/x86/include/asm/intel_pt.h +++ b/arch/x86/include/asm/intel_pt.h @@ -27,9 +27,11 @@ enum pt_capabilities { #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) void cpu_emergency_stop_pt(void); extern u32 pt_cap_get(enum pt_capabilities cap); +extern u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap); #else static inline void cpu_emergency_stop_pt(void) {} static inline u32 pt_cap_get(enum pt_capabilities cap) { return 0; } +static u32 __pt_cap_get(u32 *caps, enum pt_capabilities cap) { return 0; } Thanks,